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All data sheets are subject to change without notice

©2005 Maxwell Technologies

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16-Bit Latchup Protected Analog to Digital Converter

7809LP

01.11.05 Rev 7

Testing the 7809LPRP Latchup Protection Circuitry

The LPVANA and LPVDIG pins provide direct access to the 7809LP converter supply pins for attaching external

ing a pulsed current load to ground as shown in the test circuit in Figure 8. The most accurate threshold current mea-

surements are made with the ADS7809 in its lowest power state (PWRD = 5V).

and recovery. Applying a 10 µ sec high duration TTL level to the LPBIT pin causes internal test currents sufficient to

ing the time that the power is cycled, output signals and data from the 7809LP are invalid. The LPSTATUS signal high

indicates that power is removed from the ADS7809 die. When this signal is low, power is applied to the ADS7809 die.

The LPSTATUS signal is used to measure the supply recovery time. The supply recovery time interval starts when the

supply current rises (causing LPSTATUS to go high) and ends when the LPSTATUS signal stabilizes low again.

operation of the converter is restored with less than 5% full scale error. Additional settling time is then required to

return to full accuracy operation. Recovery time intervals are defined which indicate the time to recover first to within 8

bit accuracy, then to within 12 bit accuracy, and finally to full 16 bit accuracy. These recovery times are primarily due to

the single event and power cycling effects on the reference circuits and the settling times of their respective filter

capacitors.

Supply Threshold Current

ITHR

PWRD = 5V

75

mA

Protection Time

TPT

LPBIT = 2.4V for 5 µ s

10

µ sec

Supply Recovery Time

TSR

LPBIT = 2.4V for 5 µ s

50

µ sec

Functional Recovery Time

TFR

LPBIT = 2.4V for 5 µ s

TSR + 25

µ sec

8-bit Accuracy Recovery Time

T8R

LPBIT = 2.4V for 5 µ s

80

µ sec

Full Accuracy Recovery Time

TFAR

LPBIT = 2.4V for 5 µ s

5

msec