HD64F2145 datasheet(156/829 Pages) RENESAS

156 / 829 page

Rev. 2.0, 08/02, page 116 of 788

6.3.2

Wait State Control Register (WSCR)

WSCR is used to specify the data bus width for external address space access, the number of

access states, the wait mode, and the number of wait states for access to external address spaces.

The bus width and the number of access states for internal memory and internal I/O registers are

fixed regardless of the WSCR settings.

Bit

Bit Name

Initial Value

R/W

Description

—

R/W

Reserved

These bits should not be written by 1.

ABW

R/W

Bus Width Control

Selects 8 or 16bits for access to the external address

space.

0: 16-bit access space

1: 8-bit access space

AST

R/W

Access State Control

Selects 2 or 3 access states for access to the external

address space. This bit also enables or disables wait-

state insertion.

0: 2-state access space. Wait state insertion disabled in

external address space access

1: 3-state access space. Wait state insertion enabled in

external address space access

WMS1

WMS0

R/W

Wait Mode Select 1, 0

Select the wait mode for access to the external address

space when the AST bit is set to 1.

00: Program wait mode

01: Wait disabled mode

10: Pin wait mode

11: Pin auto-wait mode

WC1

WC0

R/W

Wait Count 1, 0

Select the number of program wait states to be inserted

when the external address space is accessed while the

AST bit is set to 1.

00: Program wait state is not inserted

01: 1 program wait state is inserted

10: 2 program wait states are inserted

11: 3 program wait states are inserted

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