865GV datasheet(39/249 Pages) INTEL

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Intel® 82865G/82865GV GMCH Datasheet

Signal Description

2.6

Analog Display Interface

Signal Name

Type

Description

HSYNC

3.3 V

GPIO

CRT Horizontal Synchronization: This signal is used as the horizontal sync

(polarity is programmable) or “sync interval.” This signal may need to be level

shifted.

VSYNC

3.3 V

GPIO

CRT Vertical Synchronization: This signal is used as the vertical sync

(polarity is programmable). This signal may need to be level shifted.

RED

Analog

RED Analog Video Output: This signal is a CRT Analog video output from the

internal color palette DAC. The DAC is designed for a 37.5

Ω equivalent load

on each signal (e.g., 75

Ω resistor on the board, in parallel with a 75 Ω CRT

load).

RED#

Analog

RED# Analog Output: This signal is an analog video output from the internal

color palette DAC. It is connected to a 37.5

Ω resistor to ground. This signal is

used to provide noise immunity.

GREEN

Analog

GREEN Analog Video Output: This signal is a CRT Analog video output from

the internal color palette DAC. The DAC is designed for a 37.5

Ω equivalent

load on each signal (e.g., 75

Ω resistor on the board, in parallel with a 75 Ω

CRT load).

GREEN#

Analog

GREEN# Analog Output: This signal is an analog video output from the

internal color palette DAC. It is connected to a 37.5

Ω resistor to ground. This

signal is used to provide noise immunity.

BLUE

Analog

BLUE Analog Video Output: This signal is a CRT Analog video output from

the internal color palette DAC. The DAC is designed for a 37.5

Ω equivalent

load on each signal (e.g., 75

Ω resistor on the board, in parallel with a 75 Ω

CRT load).

BLUE#

Analog

BLUE# Analog Output: This signal is an analog video output from the internal

color palette DAC. It is connected to a 37.5

Ω resistor to ground. This signal is

used to provide noise immunity.

REFSET

Analog

Resistor Set: Set point resistor for the internal color palette DAC. A 169

Ω, 1%

resistor is required between REFSET and motherboard ground.

DDCA_CLK

I/O

3.3 V

GPIO

Analog DDC Clock: Clock signal for the I2C style interface that connects to

Analog CRT Display.

NOTE: This signal may need to be level shifted to 5 Volts.

DDCA_DATA

I/O

3.3 V

GPIO

Analog DDC Data: Data signal for the I2C style interface that connects to

Analog CRT Display.

NOTE: This signal may need to be level shifted to 5 Volts.

865GV Datasheet(PDF) 39 Page - Intel Corporation

865GV Datasheet(HTML) 39 Page - Intel Corporation

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