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TMP61 Datasheet(PDF) 4 Page - Texas Instruments

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Part # TMP61
Description  TMP61-Q1 Automotive Grade, 10 k廓 Linear Thermistor With Small 0402 and Grade 0 Package Options
PDF  31 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMP61 Datasheet(HTML) 4 Page - Texas Instruments

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TMP61-Q1
SNIS210B – APRIL 2019 – REVISED SEPTEMBER 2019
www.ti.com
Product Folder Links: TMP61-Q1
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or anyother conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods mayaffect device reliability.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
Voltage across the device
6
V
Junction temperature (TJ)
-40
150
°C
Current through the device
450
µA
Storage temperature (Tstg)
-65
150
°C
(1)
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002(1)
HBM classification level 2
±2000
V
Charged-device model (CDM), per AEC Q100-011
CDM classification level C5
±1000
V
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VSns
Voltage Across Pins 2 (+) and 1 (–)
0
5.5
V
ISns
Current passing through the device
0
400
µA
TA
Operating free-air temperature (specified performance) (X1SON/DEC Package)
–40
125
°C
TA
Operating free-air temperature (specified performance) (TO-92S/LPG Package)
–40
150
°C
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2)
For information on self-heating and thermal response time see Layout Guidelines section.
(3)
The junction to ambient thermal resistance (RθJA ) under natural convection is obtained in a simulation on a JEDEC-standard, High-K
board as specified in JESD51-7, in an environment described in JESD51-2. Exposed pad packages assume that thermal vias are
included in the PCB, per JESD 51-5.
(4)
Changes in output due to self heating can be computed by multiplying the internal dissipation by the thermal resistance.
7.4 Thermal Information
THERMAL METRIC(1)(2)
TMP61-Q1
UNIT
DEC (X1SON)
LPG (TO-92)
2 PINS
2 PINS
RθJA
Junction-to-ambient thermal resistance(3)(4)
443.4
215
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
195.7
99.9
°C/W
RθJB
Junction-to-board thermal resistance
254.6
191.7
°C/W
ΨJT
Junction-to-top characterization parameter
19.9
35.1
°C/W
ΨJB
Junction-to-board characterization parameter
254.5
191.7
°C/W



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