3

SAM2634

2- GENERAL DESCRIPTION

SAM2634

I/O Functions

includes

Control/Status

MIDI UART

Timers

Codec data I/F

Host I/F Fifo

SPI

Synthesis/DSP

64 slots

RISC DSP core

includes

512x32 Alg RAM

128x28 MA1 RAM

256x28 MA2 RAM

256x28 MB RAM

256x16 MX RAM

256x12 MY RAM

64x13 ML RAM

MMU

Memory

Management

Unit

P16 Processor

16-bit CISC

Processor Core

includes

256x16 Data RAM

CODEC

+ DAC

ROM

or

FLASH

MIDI

8-bit port

32k x 16 RAM

ROM

Debug/Flash prog

Debug

Flash prog

Serial

Flash

SRAM

The SAM2634 is a low cost derivative of the SAM2000 series. It retains the same high

quality synthesis with up to 64 voices polyphony. The SAM2634 maximum wavetable

memory is 32 MBytes and the parallel communication is through a standard 8-bit port.

The integrated 32kx16 RAM allows for high quality effects without additional

component.

The highly integrated architecture from SAM2634 combines a specialized high-

performance RISC-based digital signal processor (Synthesis/DSP) and a general

purpose 16 bits CISC-based control processor on a single chip. An on-chip memory

management unit (MMU) allows the synthesis/DSP and the control processor to share

external ROM and/or RAM memory devices. An intelligent peripheral I/O interface

function handles other I/O interfaces, such as the 8-bit parallel, the on-chip MIDI UART,

and the Codec control interface, with minimum intervention from the control processor.

Synthesis/DSP engine

The synthesis/DSP engine operates on a frame timing basis with the frame subdivided

into 64 processes slots. Each process is itself divided into 16 micro-instructions known

as « algorithm ». Up to 32 synthesis/DSP algorithms can be stored on-chip in the Alg

RAM memory, allowing the device to be programmed for a number of audio signal

generation/processing applications. The synthesis/DSP engine is capable of generating

64 simultaneous voices using algorithms such as wavetable synthesis with interpolation,

alternate loop and 24dB resonant filtering for each voice. Slots may be linked together

to allow implementation of more complex synthesis algorithms.