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LM320240CFW Datasheet(PDF) 6 Page - Shenzhen TOPWAY Technology Co., Ltd |
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LM320240CFW Datasheet(HTML) 6 Page - Shenzhen TOPWAY Technology Co., Ltd |
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6 / 11 page ![]() TOPWAY LCD Module User Manual LM320240CFW URL: www.topwaydisplay.com www.topwaysz.com Document Name: LM320240CFW-Manual-Rev0.1.doc Page: 6 of 11 3.3 AC Characteristics 3.3.1 8080 Mode VSS=0V, VDD=3.3V, TOP=25°C Item Symbol MIN. TYP. MAX. Unit /CS setup time t1 7 - - ns A0 setup time t2 7 - - ns /WR, /RD falling edge to /WAIT driven low t3 1.6 - 20 ns D[7:0] setup time to /WR rising edge (write cycle) t4 (*2) - - ns /RD falling edge to D[7:0] driven (read cycle) t5 4 ns /CS hold time t6 9 - - ns A0 hold time t7 9 - - ns /RD, /WR rising edge to WAIT# high impedance t8 1.6 - 13 ns D[7:0] hold time from /WR rising edge (write cycle) t9 6.5 - - ns D[7:0] hold time from /CS rising edge (read cycle) t10 2.4 - 18 ns /WAIT rising edge to valid Data t11 - - (*3) ns /RD, /WR pulse inactive time t12 (*4) - - ns /WAIT pulse active time t13 - - (*5) ns Note: *1. Ts = System clock period *2. t4min = 2Ts + 5 *3. t11max = 1Ts + 7 (for 5.0V) *4. t12min = 1Ts (for a read cycle followed by a read or write cycle) = 2Ts + 2 (for a write cycle followed by a write cycle) = 5Ts + 2 (for a write cycle followed by a read cycle) *5. t13max = 4Ts + 2 *6. Input signal rise/fall time should be less than 4.5ns *7. for details, please see the S1D13700 data sheet Bus Timing Diagram |
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