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A43E06321 Datasheet(PDF) 21 Page - AMIC Technology |
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A43E06321 Datasheet(HTML) 21 Page - AMIC Technology |
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21 / 46 page ![]() A43E06321 PRELIMINARY (July, 2005, Version 0.0) 20 AMIC Technology, Corp. 12. About Burst Type Control Sequential counting At MRS A3=”0”. See the BURST SEQUENCE TABE.(BL=4,8) BL=1,2,4,8 and full page wrap around. Basic MODE Interleave counting At MRS A3=” 1”. See the BURST SEQUENCE TABE.(BL=4,8) BL=4,8 At BL=1,2 Interleave Counting = Sequential Counting Random MODE Random column Access tCCD = 1 CLK Every cycle Read/Write Command with random column address can realize Random Column Access. That is similar to Extended Data Out (EDO) Operation of convention DRAM. 13. About Burst Length Control 1 At MRS A2,1,0 = “000”. At auto precharge, tRAS should not be violated. 2 At MRS A2,1,0 = “001”. At auto precharge, tRAS should not be violated. 4 At MRS A2,1,0 = “010” Basic MODE 8 At MRS A2,1,0 = “011”. Special MODE BRSW At MRS A9=”1”. Read burst = 1,2,4,8, full page/write Burst =1 At auto precharge of write, tRAS should not be violated. RAS Interrupt (Interrupted by Precharge) Before the end of burst, Row precharge command of the same bank Stops read/write burst with Row precharge. tRDL= 2 with DQM, valid DQ after burst stop is 1,2 for CL=2,3 respectively During read/write burst with auto precharge, RAS interrupt cannot be issued. Interrupt MODE CAS Interrupt Before the end of burst, new read/write stops read/write burst and starts new read/write burst or block write. During read/write burst with auto precharge, CAS interrupt can not be issued. |
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