ADE7763ARS datasheet(51/56 Pages) AD

51 / 56 page

ADE7763

Rev. A | Page 51 of 56

Description

Bit

Location

Bit

Mnemonic

Default

Value

Use these bits to select the source of the sampled data for the waveform register.

WAVSEL1, 0

Length

Source

14, 13

WAVSEL1, 0

24 bits, active power signal (output of LPF2)

Reserved

24 bits, Channel 1

24 bits, Channel 2

POAM

Writing Logic 1 to this bit allows only positive power to accumulate. The default value of this bit is 0.

UTP

27.9k

01 = 14.4k

10 = 7.2k

11 = 3.6kS

POAM

SEL

(WAVEFORM SELECTION FOR SAMPLE MODE)

SWAP

(SWAP CH1 AND CH2 ADCs)

DTRT

(WAVEFORM SAMPLES O

00 =

UT DATA RATE)

SPS (CLKIN/128)

SPS (CLKIN/256)

SPS (CLKIN/512)

PS (CLKIN/1024)

(POSITIVE ONLY ACCUMULATION)

WAV

00 = LPF2

01 = RESERVED

10 = CH1

11 = CH2

15 14 13

1 10

ADDR: 0x09

12 1

DISHPF

(DISABLE HPF1 IN CHANNEL 1)

DISLPF2

(DISABLE LPF2 AFTER MULTIPLIER)

DISCF

DISSAG

(DISABLE SAG OUTPUT)

SWRST

(SOFTWARE CHIP RESET)

CYCMODE

ATION MODE)

DISCH2

CHANNEL 2)

(DISABLE FREQUENCY OUTPUT CF)

ASUSPEND

(SUSPEND CH1 AND CH2 ADCs)

TEMPSEL

(START TEMPERATURE SENSING)

(LINE CYCLE ENERGY ACCUMUL

NOTE: REGISTER CONTENTS SHOW POWER-ON DEFAULTS

Figure 86. Mode Register

(SHORT THE ANALOG INPUTS ON

DISCH1

(SHORT THE ANALOG INPUTS ON CHANNEL 1)

ADE7763ARS Datasheet(PDF) 51 Page - Analog Devices

ADE7763ARS Datasheet(HTML) 51 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL