LP5550 datasheet(15/25 Pages) NSC

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R2 – VO3 Voltage Register (Memory Retention Voltage) (Continued)

Bit

Field Name

Description or Comment

6:3

Voltage

Fixed voltage value. A code of all ones indicates maximum voltage while a code

of all zero indicates minimum voltage. Default value is in bold.

Voltage Data Code [6:3]

Voltage Value (volts)

4h’0

0.6

4h’1

0.65

4h’2

0.7

4h’3

0.75

4h’4

0.8

4h’5

0.85

4h’6

0.9

4h’7

0.95

4h’8

4h’9

1.05

4h’A

1.1

4h’B

1.15

4h’C

1.20 (default)

4h’D

1.25

4h’E

1.3

4h’F

1.35

2:0

Unused

These bits are fixed to ‘0’. Reading

these bits will result in a ‘000’. Any data

written into these bits using the

R3 - Status Register

Address 0x3

Type Read Only

Reset Default 8h’0F

Bit

Field Name

Description or Comment

Reserved

Reserved, read returns 0

Reserved

Reserved, read returns 0

User Bit

Unused, read returns 0

User Bit

Unused, read returns 0

Fixed OK

Unused, read returns 1

IO OK

Unused, read returns 1

Memory OK

Unused, read returns 1

Core OK

Unused, read returns 1

R4 - PWI Version Number Register

Address 0x4

Type Read Only

Reset Default 8h’01

Bit

Field Name

Description or Comment

7:0

Version

Read transaction will return 8h’01 indicating PWI 1.0 specification.

Write transactions to this register are ignored.

LP5550 Datasheet(PDF) 15 Page - National Semiconductor (TI)

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