Vishay Semiconductors

SiP12201

Document Number: 73541

S-52083–Rev. A, 10-Oct-05

www.vishay.com

9

New Product

APPLICATION NOTES

Inductor Selection:

An inductor is one of the energy storage component in

a converter. Choosing an inductor means specifying its

size, structure, material, inductance, saturation level,

DC-resistance (DCR), and core loss. Fortunately,

there are many inductor vendors that offer wide selec-

tions with ample specifications and test data, such as

Vishay Dale.

The following are some key parameters that users

should focus on. In PWM mode, inductance has a

direct impact on the ripple current. The peak-to-peak

inductor ripple current can be calculated as

where f = switching frequency.

Higher inductance means lower ripple current, lower

rms current, lower voltage ripple on both input and out-

put, and higher efficiency, unless the resistive loss of

the inductor dominates the overall conduction loss.

However, higher inductance also means a bigger

inductor size and a slower response to transients. In

PSM mode, inductance affects inductor peak current,

and consequently impacts the load capability and

switching frequency. For fixed line and load conditions,

higher inductance results in a lower peak current for

each pulse, a lower load capability, and a higher

switching frequency.

The saturation level is another important parameter in

choosing inductors. Note that the saturation levels

specified in data sheets are maximum currents. For a

dc-to-dc converter operating in PWM mode, it is the

maximum peak inductor current that is relevant, and

which can be calculated using these equations:

This peak current varies with inductance tolerance and

other errors, and the rated saturation level varies over

temperature. So a sufficient design margin is required

when choosing current ratings.

A high-frequency core material, such as ferrite, should

be chosen, the core loss could lead to serious effi-

ciency penalties. The DCR should be kept as low as

possible to reduce conduction losses.

Input Capacitor Selection:

To minimize current pulse induced ripple caused by

the step-down controller and interference of large volt-

age spikes from other circuits, a low-ESR input capac-

itor is required to filter the input voltage. The input

capacitor should be rated for the maximum RMS input

current:

It is common practice to rate for the worst-case RMS

ripple that occurs when the duty cycle is at 50%:

Output Capacitor Selection:

The selection of the output capacitor is primarily deter-

mined by the ESR required to minimize voltage ripple

and current ripple. The desired output ripple

∆V

OUT

can be calculated by:

Current ripple can be calculated by:

Where:

∆V

f = Switching frequency

T = Switching Period

Multiple capacitors placed in parallel may be needed to

meet the ESR requirements. However if the ESR is too

low it can cause instability problems.

MOSFET Selection:

The key selection criteria for the MOSFETs include

maximum specifications for on-resistance, drain-

source voltage, gate source, current, and total gate

charge Qg. While the voltage ratings are fairly straight-

forward, it is important to carefully balance on-resis-

tance and gate charge. In typical MOSFETs, the lower

the on-resistance, the higher the gate charge. The

power loss of a MOSFET consists of conduction, gate

charge, and crossover losses. For lower-current appli-

cations, gate charge losses become a significant fac-

tor, so low gate charge MOSFETs, such as Vishay

Siliconix's LITTLE FOOT family of PWM-optimized

devices, are desirable.

()

Lf

V

V

V

V

I

IN

OUT

IN

OUT

P

P

−

=

−

2

I

I

I

P

P

OUT

PK

−

+

=

⎟

⎠

⎞

⎜

⎝

⎛ −

=

IN

OUT

IN

OUT

LOAD(m ax)

RMS

V

V

1

V

V

I

I

2

I

I

LOAD(max)

RMS

=

()

⎟

⎠

⎞

⎜

⎝

⎛

+

=

∆

OUT

min

m ax

8fC

1

ESR

I

-

I

()

)

V

V

(

V

V

L

T

I

-

I

OUT

-

IN

IN

OUT

min

m ax

=