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DLPC4422ZPC Datasheet(PDF) 8 Page - Texas Instruments |
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DLPC4422ZPC Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 49 page  8 DLPC4422 DLPS074 – FEBRUARY 2017 www.ti.com Product Folder Links: DLPC4422 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Pin Configurations and Functions (continued) PIN (1) I/O (2) DESCRIPTION NAME NO. SCB_P J1 O7 DMD, LVDS I/F channel A, differential serial control SCB_N J2 O7 DMD, LVDS I/F channel A, differential serial control DDB_P_15 N1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_15 N2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_14 N3 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_14 N4 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_13 M2 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_13 M1 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_12 M3 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_12 M4 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_11 L1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_11 L2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_10 L3 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_10 L4 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_9 K1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_9 K2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_8 K3 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_8 K4 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_7 H1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_7 H2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_6 H3 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_6 H4 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_5 G1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_5 G2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_4 G3 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_4 G4 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_3 F1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_3 F2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_2 F3 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_2 F4 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_1 E1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_1 E2 O7 DMD, LVDS I/F channel B, differential serial data DDB_P_0 D1 O7 DMD, LVDS I/F channel B, differential serial data DDB_N_0 D2 O7 DMD, LVDS I/F channel B, differential serial data PROGRAM MEMORY (Flash and SRAM) INTERFACE PM_CSZ_0 D13 O5 Input Bus D Data bit 3. 100-Ω internal LVDS termination. PM_CSZ_1 E12 O5 PM_CSZ_2 A13 O5 Input Bus D Data bit 5. 100-Ω internal LVDS termination. PM_ADDR_22 (GPIO 36) A12 B5 PM_ADDR_21 (GPIO 35) E11 B5 Input Bus D Data bit 10. 100-Ω internal LVDS termination. PM_ADDR_20 D12 O5 PM_ADDR_19 C12 O5 Input Bus D Data bit 11. 100-Ω internal LVDS termination. PM_ADDR_18 B11 O5 PM_ADDR_17 A11 O5 Input Bus D Data bit 12. 100-Ω internal LVDS termination. PM_ADDR_16 D11 O5 PM_ADDR_15 C11 O5 Input Bus D Data bit 13. 100-Ω internal LVDS termination. PM_ADDR_14 E10 O5 PM_ADDR_13 D10 O5 Input Bus D Data bit 14. 100-Ω internal LVDS termination. PM_ADDR_12 C10 O5 PM_ADDR_11 B9 O5 Input Bus D Data bit 15. 100-Ω internal LVDS termination. PM_ADDR_10 A9 O5 |
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