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EPC8XXX Datasheet(PDF) 13 Page - Altera Corporation |
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EPC8XXX Datasheet(HTML) 13 Page - Altera Corporation |
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13 / 36 page ![]() Altera Corporation 2–13 August 2005 Configuration Handbook, Volume 2 Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet internal interface to the flash. Simultaneous access by the controller and the external device will cause contention, and result in configuration and programming failures. Since the internal flash interface is directly connected to the external flash interface pins, controller flash access cycles will toggle the external flash interface pins. The external device must be able to tri-state its flash interface during these times and ignore transitions on the flash interface pins. 1 The external flash interface signals cannot be shared between multiple enhanced configuration devices because this causes contention during in-system programming and configuration. During these times, the controller chips inside the enhanced configuration devices are actively accessing flash memory. Therefore, enhanced configuration devices do not support shared flash bus interfaces. The enhanced configuration device controller chip accesses flash memory during: ■ FPGA configuration—reading configuration data from flash ■ JTAG-based flash programming—storing configuration data in flash ■ At POR—reading option bits from flash During these times, the external FPGA/processor must tri-state its interface to the flash memory. After configuration and programming, the enhanced configuration device’s controller tri-states the internal interface and goes into an idle mode. To interrupt a configuration cycle in order to access the flash via the external flash interface, the external device can hold the FPGA’s nCONFIG input low. This keeps the configuration device in reset by holding the nSTATUS-OE line low, allowing external flash access. f For further details on the software support for the external flash interface feature, refer to Using Altera Enhanced Configuration Devices, chapter 3 in volume 2 of the Configuration Handbook. For details on flash commands, timing, memory organization, and write protection features, refer to the appropriate flash data sheet (Sharp LHF16306 for EPC16 devices and Micron MT28F400B3 for EPC4 devices) on the Altera web site at www.altera.com . Figure 2–4 shows a FPP configuration schematic with the external flash interface being used. |
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