EXTERNAL COMPONENT LIST FOR THE L3000N

Component

Involved Parameter or Function

Ref

Value

RH

22.5K

Ω ±2%

Bias Resistor

RP

30 to 100

Ω

Lines Series Resistor

CDVB

47

µF - 20V ±20%

Battery Voltage Rejection

CVB+

0.1

µF - 100V ±20%

Positive Battery Filter

CVB-

0.1

µF - 100V ±20% (note 1)

Negative Battery Filter

DS

BAT49X (note 2)

Protective Shottky Diode

EXTERNAL COMPONENT LIST FOR THE L3092

CVSS

0.1

µF - 15V

Negative Supply Voltage Filter

CVDD

0.1

µF - 15V

Positive Supply Voltage Filter

CAC

47

µF - 10V ±20%

AC Path Decoupling

ZAC

25 x (ZML - 2xRP)

2 Wire AC Impedance

CCOMP

AC Loop Compensation

RPC

25 x (2xRP)

RDC

2 x (RFS - RP)

DC Feeding Resistor (RDC > 200

Ω)

RL

63.4K

Ω ±1%

Bias Resistor

ZA

SLIC Impedance Balancing Network

ZB

Line Impedance Balancing Network

CINT

see Table 2 (note 5)

Ring Trip Detection Time Constant

RT

47K

Ω

Resistors used only in the automatic stand-by mode.

RR

47K

Ω

RS

1.5M

Ω (note 6)

CS

47nF

To be used only if high common mode rejection in Aut. SBY

mode and in Power Down mode is requested (note 7)

CMR

100nF

To be used only if Power on reset requested. The capacitor

Notes:

1) In case line cards with less than 7 subscribers are implemented CVB- capacitor should be equal to 680nF/N where N is the number of

subscriber per card.

2) This shottky diode or equivalent is necessary to avoid damage to the device during hot insertion or in all those cases when a proper power

up sequence cannot be guaranteed. In case the Shottky diode is not implemented the power sequence should guarantee that VB+ is always

the last supply applied at power on and the first removed at power off.

In case an other shottky diode type is adopted it must fulfill the following characteristics:

Where n is the number of line sharing the same diode.

3) The structure of this network shall copy the SLIC output impedance multiplexed by a factor K = 10 to 25. This network must be removed

when 2/4 wire conversion is implemented with 2nd generation COMBO (EG. TS5070).

4) The structure of this network shall copy the line impedance, Zline, multiplexed by a factor K = 10 to 25 and compensate the effect of CCOMP

on transhybrid rejection. This network must be removed when 2/4 wire conversion is implemented with 2nd generation COMBO (EG. TS5070).

6) Value related to Vb = 48V application, for application with different battery voltages should be properly dimensioned (see Fig.4).

7) Ex.: For line leakage resistance to GND equal to 500K

Fr (Hz)

16/18

19/21

22/27

28/32

33/38

39/46

47/55

56/68

CINT (nF)

680

580

470

390

330

270

220

180

The CINT value can be optimized experimentally

for each application choosing the lower value that

in correspondance of the lower ringing frequency,

the minimum line lenght and the higher number of

ringers doesn’t produce false off-hook detection.

1

2

)

25

K

x CCOMP

)(note 4)

Table 2

L3000N - L3092

14/32