TM2SN64EPN 2097152 BY 64-BIT

TM4SN64EPN 4194304 BY 64-BIT

SYNCHRONOUS DYNAMIC RAM MODULES

SMMS696 – AUGUST 1997

13

POST OFFICE BOX 1443

serial presence detect (continued)

Table 2. Serial Presence-Detect Data for the TM4SN64EPN (Continued)

BYTE

DESCRIPTION OF FUNCTION

TM4SN64EPN-10

TM4SN64EPN-12

NO.

DESCRIPTION OF FUNCTION

ITEM

DATA

ITEM

DATA

27

Minimum row precharge time

tRP = 30 ns

1Eh

tRP = 30 ns

1Eh

28

Minimum row-active to row-active delay

tRRD = 20 ns

14h

tRRD = 24 ns

18h

29

Minimum RAS-to-CAS delay

tRCD = 30 ns

1Eh

tRCD = 30 ns

1Eh

30

Minimum RAS pulse width

tRAS = 50 ns

32h

tRAS = 60 ns

3Ch

31

Density of each bank on module

16M Bytes

04h

16M Bytes

04h

32–61

Superset features (may be used in the future)

62

SPD revision

Rev. 1

01h

Rev. 1

01h

63

Checksum for byte 0 – 62

159

9Fh

232

E8h

64 – 71

Manufacturer’s JEDEC ID code per JEP – 106E

97h

9700...00h

97h

9700...00h

72

Manufacturing location†

TBD

TBD

73–90

Manufacturer’s part number†

TBD

TBD

91

Die revision code†

TBD

TBD

92

PCB revision code†

TBD

TBD

93–94

Manufacturing date†

TBD

TBD

95–98

Assembly serial number†

TBD

TBD

99–125

Manufacturer specific data†

TBD

TBD

126–127

Vendor specific data†

TBD

TBD

128–166

System integrator’s specific data‡

TBD

TBD

167–255

Open

† TBD indicates values are determined at manufacturing time and are module dependent.

‡ These TBD values are determined and programmed by the customer (optional).