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P/N:PM0488
REV. 1.7, SEP. 15, 1998
MX98725
5.2.8 MISSED FRAME COUNTER ( CSR8 )
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Missed Frame Overflow
Missed Frame Counter
Field
Name
Description
16
MFO
Missed Frame Overflow, set when missed frame counter overflows, reset when CSR8 is
read.
15:0
MFC
Missed Frame Counter, indicates the number of frames discarded because no host
receive descriptors were available.
5.2.9 NON-VOLATILE MEMORY CONTROL REGISTER ( CSR9 )
Field
Name
Description
31
LED3SEL
0:Default value. Set LED3 as RX LED.
1: Set LED3 as Full/Half duplex LED.
30
LED2SEL
0:Default value. Set LED2 as Link Speed (10/100) LED.
1: Set LED2 as Collision LED.
29
LED1SEL
0:Default value. Set LED1 as Good Link LED.
1: Set LED1 as Link/Activity LED.
28
LED0SEL
0:Default value. Set LED0 as Activity LED.
1: Set LED0 as Link Speed (10/100) LED.
14
RD
Boot ROM/EEPROM read operation select bit.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
LED2SEL
LED3SEL
BR-Boot ROM Select
Data-Boot ROM data
or Serial ROM control
LED1SEL
LED0SEL
RD-Read Operation
SR-Serial ROM Select
WR-Write Operation
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