M41T62 datasheet(41/42 Pages) STMICROELECTRONICS

41 / 42 page

List of figures

Figure 1.

M41T62 logic diagram ............................................................... 2

Figure 2.

M41T64 logic diagram ............................................................... 3

Figure 3.

M41T65 logic diagram ............................................................... 3

Figure 4.

M41T62 connections ................................................................ 3

Figure 5.

M41T64 connections ................................................................ 4

Figure 6.

M41T65 connections ................................................................ 4

Figure 7.

M41T62 block diagram .............................................................. 5

Figure 8.

M41T64 block diagram .............................................................. 5

Figure 9.

M41T65 block diagram .............................................................. 5

Figure 10.

Hardware hookup for SuperCap™ backup operation .......................................... 6

Figure 11.

Serial bus data transfer sequence ....................................................... 8

Figure 12.

Acknowledgement sequence .......................................................... 8

Figure 13.

Slave address location............................................................... 9

Figure 14.

READ mode sequence .............................................................. 9

Figure 15.

Alternative READ mode sequence ...................................................... 9

Figure 16.

WRITE mode sequence............................................................. 10

Figure 17.

Buffer/transfer registers ............................................................. 12

Figure 18.

Crystal accuracy across temperature.................................................... 17

Figure 19.

Calibration waveform............................................................... 17

Figure 20.

Alarm interrupt reset waveform ........................................................ 18

Figure 21.

Century bits CB1 and CB0 ........................................................... 20

Figure 22.

AC measurement I/O waveform ....................................................... 23

Figure 23.

Crystal isolation example ............................................................ 23

Figure 24.

Bus timing requirements sequence ..................................................... 26

Figure 25.

QFN16 — 16-pin, quad, flat package, no-lead, 3x3 mm, package outline ........................... 28

Figure 26.

QFN16 — 16-pin, quad, flat package, no-lead, 3 x 3 mm recommended footprint ..................... 30

Figure 27.

LCC8 — 8-pin, 1.5 x 3.2 mm leadless chip carrier package outline ............................... 31

Figure 28.

LCC8 — 8-pin, 1.5 x 3.2 mm leadless chip carrier recommended footprint .......................... 32

Figure 29.

Carrier tape for QFN16 3 x 3 mm package ................................................ 33

Figure 30.

Carrier tape for LCC8 1.5 x 3.2 mm package .............................................. 34

Figure 31.

Reel schematic................................................................... 34

M41T62, M41T64, M41T65

List of figures

DS3840 - Rev 24

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