MMA8652FC datasheet(49/65 Pages) NXP

49 / 65 page

MMA8652FC

Sensors

Freescale Semiconductor, Inc.

6.10.5

0x27: PULSE_LTCY Pulse Latency Timer register

Bits LTCY7 – LTCY0 define the time interval that starts after the first pulse detection. During this time interval, all pulses are ignored.

NOTE

This timer must be set for single pulse and for double pulse.

The minimum time step for the pulse latency is defined in Table 83 and Table 84.

•

The maximum time is the time step at the ODR and Oversampling mode multiplied by 255.

•

The timing also changes when the Pulse LPF is enabled or disabled.

Table 81. 0x27 PULSE_LTCY register (Read/Write)

Back to Register Address Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

LTCY7

LTCY6

LTCY5

LTCY4

LTCY3

LTCY2

LTCY1

LTCY0

Table 82. PULSE_LTCY register

Bit(s)

Field

Description

7–0

LTCY[7:0]

Latency Time Limit

0000_0000 (default)

Table 83. Time Step for PULSE Latency at ODR and Power mode (Reg 0x0F) Pulse_LPF_EN = 1

ODR (Hz)

Max Time Range (s)

Time Step (ms)

Normal

LPLN

HighRes

Normal

LPLN

HighRes

800

0.638

2.5

400

1.276

5555

200

2.56

1.276

2.56

100

5.1

1.276

5.1

10.2

1.276

10.2

12.5

10.2

40.8

1.276

40.8

160

6.25

10.2

40.8

1.276

81.6

160

320

1.56

10.2

40.8

1.276

81.6

160

320

Table 84. Time Step for PULSE Latency at ODR and Power Mode (Reg 0x0F) Pulse_LPF_EN = 0

ODR (Hz)

Max Time Range (s)

Time Step (ms)

Normal

LPLN

HighRes

Normal

LPLN

HighRes

800

0.318

1.25

400

0.318

0.638

1.25

2.5

200

0.638

0.318

1.276

2.5

1.25

100

1.276

0.318

2.56

1.25

2.56

0.318

5.1

1.25

12.5

2.56

10.2

0.318

20.4

1.25

6.25

2.56

10.2

0.318

20.4

1.25

1.56

2.56

10.2

0.318

20.4

1.25

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