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VSC6424 Datasheet(PDF) 1 Page - Vitesse Semiconductor Corporation |
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VSC6424 Datasheet(HTML) 1 Page - Vitesse Semiconductor Corporation |
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1 / 18 page ![]() VITESSE SEMICONDUCTOR CORPORATION Preliminary Datasheet VSC6424 500 Mb/s Video Shift Register IC G52236-0, Rev 3.0 © VITESSE SEMICONDUCTOR CORPORATION Page 1 7/13/99 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 Features General Description The VSC6424 is a 500Mb/s video shift register IC that is based on a 40-bit user-configured shift register. The shift register may be used either as a multiplexer (parallel in, serial out) or as a demultiplexer (serial in, par- allel out). The VSC6424 can be configured into 8 5-bit, 8 4-bit, 5 8-bit, 4 10-bit, 2 16-bit, 2 20-bit, 1 32-bit, or 1 40-bit shift register. VSC6424 Functional Block Diagram • Multiplex or Demultiplex Operation • Selectable Shift Register Length • 500Mb/s Operation using internal timing • 250Mb/s Operation using external timing • Functional Replacement for Bt424 • External ECL Reference Voltage (-1.32 V) • ECL and TTL I/Os: ECL for high-speed interface, TTL for low-speed interface • Power Supplies: +3.3V and -2V @ 2.7 Watts (Max.) • Commercial (0o to +70oC) Temperature Range • Package: 14mm x 20mm 128 PQFP 40-bit INT/EXTN MODE Clock Generator Shift Register 40 CLKE(ECL) CLKT(TTL) S<0:2> High Speed Interface SP<0:2> A<0:4> SLDN/SYNC SB<0:39> 40 10 40 OPS CLK LLDN Phase Rotation HBLANK VBLANK SEN/DIVC AEN/RETIME SIN OEN DE- MUX MUX (TTL) Input Latch 3 5 3 8 10 DIN<0:9> CLKOUT DOUT<0:7> (ECL) Low Speed Interface (TTL) (ECL) (ECL) |
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