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ATSAM9743 Datasheet(PDF) 13 Page - ATMEL Corporation |
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ATSAM9743 Datasheet(HTML) 13 Page - ATMEL Corporation |
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13 / 21 page ![]() 13 ATSAM9743 1773B–DRMSD–11/02 Parallel Interface Figure 7. Host Interface Read Cycle Figure 8. Host Interface Write Cycle tDRH tRDLDV tRDHCSH tPRD tCSLRDL tAVCS A0 CS RD D[15:0] tDWH tDWS tWRHCSH tPWR tCSLWRL tAVCS A0 CS WR D[15:0] Table 10. Parameters for the Parallel Interface Symbol Parameter Min Typ Max Unit tAVCS Address valid to chip select low 0 ns t CSLRDL Chip select low to RD low 5 ns t RDHCSH RD high to CS high 5 ns tPRD RD pulse width 50 ns t RDLDV Data out valid from RD 20 ns t DRH Data out hold from RD 510 ns tCSLRWRL Chip select low to WR low 5 ns t WRHCSH WR high to CS high 5 ns t PWR WR pulse width 50 ns tDWS Write data setup time 10 ns t DWH Write data hold time 0 ns |
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