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XRT7250 Datasheet(PDF) 120 Page - Exar Corporation |
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XRT7250 Datasheet(HTML) 120 Page - Exar Corporation |
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120 / 463 page ![]() áç áç áç áç DS3/E3 FRAMER IC XRT7250 REV. 1.1.1 101 NOTE: For more information on the A-bit, within the ITU-T G.751 frame, please see Section 4.1.1.1. Bits 4, 3, TxNSourceSel[1:0] These two Read/Write bit-fields combine to specify the source of the N-bit, within each outbound E3 frame. The relationship between these two bit-fields and the resulting source of the N Bit is tabulated be- low. NOTE: For more information on the N-bit, within the ITU-T G.751 frame, please see Section 4.1.1.2. Bit 2 - TxAIS Enable This Read/Write bit-field permits the user to configure the Transmit Section of the Framer IC to transmit an AIS pattern to the remote terminal Setting this bit-field to "0" configures the Transmit Section (of the chip) to transmit data in a normal man- ner (e.g., as received via the Input Interface). Setting this bit-field to "1" configures the Transmit Section (of the chip) to transmit an "All Ones" pattern (e.g., an AIS pattern) to the remote terminal. NOTE: For more information on the AIS pattern, please see Section 4.2.4.2.1.1. Bit 1 - TxLOS Enable This Read/Write bit-field permits the user to configure the Transmit Section of the Framer IC to transmit an LOS (e.g., All Zeros) pattern to the remote terminal Setting this bit-field to "0" configures the Transmit Section (of the chip) to transmit data in a normal man- ner (e.g., as received via the Input Interface). Setting this bit-field to "1" configures the Transmit Section (of the chip) to transmit an "All Zeros" pattern (e.g., an LOS pattern) to the remote terminal. NOTE: For more information on the LOS pattern, please see Section 4.2.4.2.1.2. Bit 0 - TxFAS Source Select This Read/Write bit-field permits the user to configure the Transmit Section of the Framer IC to either: a. Internally generate the FAS (Framing Alignment Signal) pattern, within the outbound E3 frames, or to b. use the Input Interface as the source for the FAS pattern. Setting this bit-field to "0" configures the Transmit Section of the Framer IC to internally generate the FAS pattern, for each outbound E3 frame. Setting this bit-field to "1" configures the Transmit Section of the Framer IC to use the Input Interface as the source for the FAS pattern. NOTE: For more information on the FAS pattern, please see Section 4.1. 2.3.7.2 Transmit E3 LAPD Configuration Reg- ister (ITU-T G.751) 11 Functions as a FEBE (Far-End-Block Error) bit-field. This bit-field is set to "0", if the Near-End Receive Section (within this chip) detects no BIP-4 Errors within the incoming E3 frames. This bit-field is set to "1", if the Near-End Receive Section (within this chip) detects a BIP-4 Error within the incoming E3 frame. TXASOURCESEL[1:0] SOURCE OF A BIT TXNSOURCESEL[1:0] SOURCE OF N BIT 00 TxE3 Service Bits Register (Address = 0x35) 01 Transmit Overhead Data Input Interface 10 Transmit LAPD Controller 11 Transmit Payload Data Input Interface. |
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