XRT7250 datasheet(139/463 Pages) EXAR

139 / 463 page

XRT7250

DS3/E3 FRAMER IC

áç

REV. 1.1.1

120

Therefore, if the user is using either one of these in-

puts as an interrupt request input, then the user must

ensure that the appropriate interrupt service routine

or unconditional branch instruction (to the interrupt

service routine) is located at one of these address lo-

cations.

If the 8051 Microcontroller IC is required to interface

to external components in the data memory space of

sizes greater than 256 bytes, then both Ports 0 and 2

must be used as the address and data lines. Port 0

will function as a multiplexed address/data bus. Dur-

ing the first half of a memory cycle, Port 0 will operate

as the lower address byte. During the second half of

the memory cycle, Port 0 will operate as the bi-direc-

tional data bus. Port 2 will be used as the upper ad-

dress byte. ALE and the use of a 74HC373 transpar-

ent latch device can be used to de-multiplex the Ad-

dress and Data bus signals.

Figure 37 presents a schematic illustrating how the

XRT7250 DS3/E3 Framer can be interfaced to the

8051 Microcontroller IC.

The circuitry in Figure 37 will function as follows, dur-

ing a Framer-request interrupt. The Framer device

would request an interrupt from the CPU by asserting

its active low INT output pin. This will cause the

INT0* input pin of the CPU to go "Low”. When this

happens the 8051 CPU will finish executing its cur-

rent instruction, and will then branch program control

to the Framer Device interrupt service routine. In the

case of Figure 37, the interrupt service routine will be

located in 0x0003 in code memory. The 8051 CPU

TABLE 13: INTERRUPT SERVICE ROUTINE LOCATION (IN CODE MEMORY) FOR THE INT0* AND INT1* INTERRUPT

INPUT PINS

INTERRUPT PIN

BRANCH TO LOCATION (IN SYSTEM MEMORY)

INT0*

0x0003

INT1*

0x0013

FIGURE 37. SCHEMATIC DEPICTING HOW TO INTERFACE THE XRT7250 DS3/E3 FRAMER IC TO THE 8051 MICRO-

CONTROLLER

+5V

8051

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

ALE

A10

A11

A12

A13

A14

A15

INT0

INT1

XRT7250

RESET

RDB_DS

ALE_AS

INT

WRB_RW

MOTO/INTEL

Rdy_Dtck

74HC373

to Address Decoder

from Address Decoder

ALE

INTERRUPT

RESET Command Circuitry

XRT7250 Datasheet(PDF) 139 Page - Exar Corporation

XRT7250 Datasheet(HTML) 139 Page - Exar Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL