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XRT7250 Datasheet(PDF) 159 Page - Exar Corporation

Part # XRT7250
Description  DS3/E3 FRAMER IC
PDF  463 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT7250 Datasheet(HTML) 159 Page - Exar Corporation

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XRT7250
DS3/E3 FRAMER IC
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REV. 1.1.1
140
In this mode, the Transmit Section of the XRT7250
will use the TxInClk signal as its timing reference.
B. Serial Mode
The XRT7250 will receive the DS3 payload data, in a
serial manner, via the TxSer input pin. The Transmit
Payload Data Input Interface (within the XRT7250)
will latch this data into its circuitry, on the rising edge
of the TxInClk input clock signal.
C. Delineation of outbound DS3 frames (Frame
Master Mode)
The Transmit Section of the XRT7250 will use the Tx-
InClk signal as its timing reference, and will initiate
DS3 frame generation, asynchronously with respect
to any externally applied signal. The XRT7250 will
pulse its TxFrame output pin "High" whenever its it
processing the very last bit-field within a given DS3
frame.
D. Sampling of payload data, from the Terminal
Equipment
In Mode 3, the XRT7250 will sample the data, at the
TxSer input pin, on the rising edge of TxInClk.
Interfacing the Transmit Payload Data Input Inter-
face block of the XRT7250 to the Terminal Equip-
ment for Mode 3 Operation
Figure 48 presents an illustration of the Transmit Pay-
load Data Input Interface block (within the XRT7250)
being interfaced to the Terminal Equipment, for Mode
3 operation.
Mode 3 Operation of the Terminal Equipment
In Figure 48, both the Terminal Equipment and the
XRT7250 are driven by an external 44.736MHz clock
signal. This clock signal is connected to the
DS3_Clock_In input of the Terminal Equipment and
the TxInClk input pin of the XRT7250.
The Terminal Equipment will serially output the pay-
load data on its DS3_Data_Out output pin, upon the
rising edge of the signal at the DS3_Clock_In input
pin. Similarly, the XRT7250 will latch the data, resid-
ing on the TxSer input pin, on the rising edge of TxIn-
Clk.
The XRT7250 will pulse the TxFrame output pin
"High" for one bit-period, coincident while it is pro-
cessing the last bit-field within a given outbound DS3
frame. The Terminal Equipment is expected to moni-
tor the TxFrame signal (from the XRT7250) and to
place the first bit, within the very next outbound DS3
frame on the TxSer input pin.
NOTE: In this case, the XRT7250 dictates exactly when the
very next DS3 frame will be generated.
The Terminal Equipment is expected to respond ap-
propriately by providing the XRT7250 with the first bit
of the new DS3 frame, upon demand. Hence, in this
mode, the XRT7250 is referred to as the Frame Mas-
FIGURE 48. ILLUSTRATION OF THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA
INPUT INTERFACE BLOCK OF THE XRT7250 FOR MODE 3 (SERIAL/LOCAL-TIMED/FRAME-MASTER) OPERATION
Terminal Equipment
XRT7250 DS3 Framer
DS3_Data_Out
DS3_Clock_In
Tx_Start_of_Frame
DS3_Overhead_Ind
TxSer
TxInClk
TxFrame
TxOH_Ind
NibInt
44.736 MHz Clock
Source



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