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XRT7250 Datasheet(PDF) 165 Page - Exar Corporation

Part # XRT7250
Description  DS3/E3 FRAMER IC
PDF  463 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT7250 Datasheet(HTML) 165 Page - Exar Corporation

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XRT7250
DS3/E3 FRAMER IC
áç
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REV. 1.1.1
146
How to configure the XRT7250 into Mode 5
1. Set the NibIntf input pin "High".
2. Set the TimRefSel[1:0] bit-fields (within the
Framer Operating Mode Register) to "01" as illus-
trated below.
3. Interface the XRT7250, to the Terminal Equip-
ment, as illustrated in Figure 52.
4.2.1.6
Mode 6 - The Nibble-Parallel/TxInClk/
Frame-Master Interface Mode Behavior of the
XRT7250
If the XRT7250 has been configured to operate in this
mode, then the XRT7250 will function as follows:
A. Local-Timed (Uses the TxInClk signal as the
Timing Reference)
In this mode, the Transmit Section of the XRT7250
will use the TxInClk signal at its timing reference.
Further, the chip will internally divide the TxInClk
clock signal by a factor of 4 and will output this divid-
ed clock signal via the TxNibClk output pin. The
Transmit Terminal Equipment Input Interface block
(within the XRT7250) will use the rising edge of the
TxNibClk signal, to latch the data, residing on the Tx-
Nib[3:0] into its circuitry.
FIGURE 53. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT7250 AND THE TERMINAL EQUIP-
MENT
(DS3 MODE 5 OPERATION)
Terminal Equipment Signals
XRT7250 Transmit Payload Data I/F Signals
DS3 Frame Number N
DS3 Frame Number N + 1
Note: TxFrameRef is pulsed high to denote
first nibble within a new DS3 frame
TxInClk
Tx_Start_of_Frame
DS3_Nib_Clock_In
DS3_Data_Out[3:0]
Nibble [0]
Nibble [1]
TxInClk
TxFrameRef
TxNibClk
TxNib[3:0]
Nibble [0]
Nibble [1]
Nibble [1175]
Nibble [1175]
Sampling edge of the XRT7250
Device
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT2
BIT 1
BIT 0
Local Loopback
DS3/E3*
Internal LOS
Enable
RESET
Interrupt
Enable Reset
Frame Format
TimRefSel[1:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
00
1
0
1
0
0
1



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