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XRT7250 Datasheet(PDF) 262 Page - Exar Corporation

Part # XRT7250
Description  DS3/E3 FRAMER IC
PDF  463 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT7250 Datasheet(HTML) 262 Page - Exar Corporation

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XRT7250
DS3/E3 FRAMER IC
REV. 1.1.1
243
Tx_Start_of_Frame (or TxFrameRef) signal is syn-
chronized to the TxInClk input clock signal.
Finally, the XRT7250 will pulse its TxOH_Ind output
pin, one bit-period prior to it processing a given over-
head bit, within the outbound E3 frame. Since the
TxOH_Ind output pin of the XRT7250 is electrically
connected to the E3_Overhead_Ind whenever the
XRT7250 pulses the TxOH_Ind output pin "High", it
will also be driving the E3_Overhead_Ind input pin (of
the Terminal Equipment) "High". Whenever the Ter-
minal Equipment detects this pin toggling "High", it
should delay transmission of the very next E3 frame
payload bit by one clock cycle.
The behavior of the signals between the XRT7250
and the Terminal Equipment for E3 Mode 2 Operation
is illustrated in Figure 103.
How to configure the XRT7250 to operate in this
mode.
1. Set the NibIntf input pin "Low".
2. Set the TimRefSel[1:0] bit-fields (within the
Framer Operating Mode Register) to "01" as
depicted below.
3. Interface the XRT7250, to the Terminal Equip-
ment, as illustrated in Figure 102.
5.2.1.3
Mode 3 - The Serial/Local-Timed/
Frame-Master Mode Behavior of the XRT7250
FIGURE 103. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT7250 AND THE TERMINAL
EQUIPMENT (MODE 2 OPERATION)
Terminal Equipment Signals
E3_Clock_In
E3_Data_Out
Tx_Start_of_Frame
E3_Overhead_Ind
XRT7250 Transmit Payload Data I/F Signals
TxInClk
TxSer
TxFrameRef
TxOH_Ind
Payload[1522]
Payload[1523]
FAS, Bit 9
FAS, Bit 8
Payload[1522]
Payload[1523]
FAS, Bit 9
FAS, Bit 8
Note: FAS Pattern bits will not be processed by the
Transmit Payload Data Input Interface.
E3 Frame Number N
E3 Frame Number N + 1
Note: TxFrame pulses high to denote
E3 Frame Boundary.
Note: TxOH_Ind pulses high for
12 bit periods in order to
denote Overhead Data
(e.g., the FAS pattern
and the A & N bits).
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT2
BIT 1
BIT 0
Local
Loopback
DS3/E3*
Internal
LOS
Enable
RESET
Interrupt
Enable
Reset
Frame
Format
TimRefSel[1:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0101
0
0
1



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