XRT7250 datasheet(301/463 Pages) EXAR

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XRT7250

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DS3/E3 FRAMER IC

REV. 1.1.1

282

Setting this bit-field to “1” enables the Transmit Sec-

tion (at the Block Level) for Interrupt Generation.

Conversely, setting this bit-field to “0” disables the

Transmit Section for interrupt generation.

What does it mean for the Transmit Section Inter-

rupts to be enabled or disabled at the Block Lev-

el?

If the Transmit Section is disabled (for interrupt gener-

ation) at the Block Level, then ALL Transmit Section

interrupts are disabled, independent of the interrupt

enable/disable state of the source level interrupts.

If the Transmit Section is enabled (for interrupt gener-

ation) at the block level, then a given interrupt will be

enabled at the source level. Conversely, if the Trans-

mit Section is enabled (for interrupt generation) at the

Block level, then a given interrupt will still be disabled,

if it is disabled at the source level.

As mentioned earlier, the Transmit Section of the

XRT7250 Framer IC contains the Completion of

Transmission of LAPD Message Interrupt.

The Enabling/Disabling and Servicing of this interrupt

is presented below.

5.2.6.1.1

The Completion of Transmission of

the LAPD Message Interrupt

If the Transmit Section interrupts have been enabled

at the Block level, then the user can enable or disable

the Completion of Transmission of a LAPD Message

Interrupt, by writing the appropriate value into Bit 1

(TxLAPD Interrupt Enable) within the Tx E3 LAPD

Status & Interrupt Register (Address = 0x34), as illus-

trated below.

Setting this bit-field to “1’ enables the Completion of

Transmission of a LAPD Message Interrupt. Con-

versely, setting this bit-field to “0” disables the Com-

pletion of Transmission of a LAPD Message interrupt.

5.2.6.1.2

Servicing the Completion of Trans-

mission of a LAPD Message Interrupt

As mentioned previously, once the user commands

the LAPD Transmitter to begin its transmission of a

LAPD Message, it will do the following.

1. It will parse through the contents of the Transmit

LAPD Message Buffer (located at address loca-

tions 0x86 through 0xDD) and search for a string

of five (5) consecutive “1’s”. If the LAPD Trans-

mitter finds a string of five consecutive “1’s”

(within the content of the LAPD Message Buffer,

then it will insert a “0” immediately after this

string.

2. It will compute the FCS (Frame Check Sequence)

value and append this value to the back-end of

the user-message.

3. It will read out of the content of the user (zero-

stuffed) message and will encapsulate this data

into a LAPD Message frame.

4. Finally, it will begin transmitting the contents of

this LAPD Message frame via the “N” bits, within

each outbound E3 frame.

5. Once the LAPD Transmitter has completed its

transmission of this LAPD Message frame (to the

BLOCK INTERRUPT ENABLE REGISTER (ADDRESS = 0X04)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

RxDS3/E3

Interrupt

Enable

Not Used

TxDS3/E3

Interrupt

Enable

One-Second

Interrupt

Enable

R/W

RORO

R/W

000

TXE3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Not Used

TXDL Start

TXDL Busy

TxLAPD

Interrupt

Enable

TxLAPD

Interrupt

Status

R/W

RUR

000

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