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XRT7250 Datasheet(PDF) 317 Page - Exar Corporation |
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XRT7250 Datasheet(HTML) 317 Page - Exar Corporation |
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317 / 463 page ![]() XRT7250 áç áç áç áç DS3/E3 FRAMER IC REV. 1.1.1 298 Writing a “0” into this bit-field causes the Receive E3 Framer block to declare a FERF condition, if it detects 3 consecutive incoming E3 frames, that have the “A” bit set to “1”. Writing a “1” into this bit-field causes the Receive E3 Framer block to declare a FERF condition, if it detects 5 consecutive incoming E3 frames, that have the “A” bit set to “1”. Whenever the Receive E3 Framer block declares a FERF condition, then it will do the following. • Generate a Change in FERF Condition interrupt to the MIcroprocessor. Hence, the Receive E3 Framer block will assert Bit 3 (FERF Interrupt Sta- tus) within the Rx E3 Framer Interrupt Status regis- ter - 2, as depicted below. • Set the RxFERF bit-field, within the Rx E3 Configu- ration/Status Register to “1”, as depicted below. Clearing the FERF Condition The Receive E3 Framer block will clear the FERF condition once it has received a User-Selectable number of E3 frames with the “A” bit-field being set to “0” (e.g., no FERF condition). This User-Selectable number of E3 frames is either 3 or 5 depending upon the value that has been written into Bit 4 (RxFERF Al- go) of the Rx E3 Configuration/Status Register, as discussed above. Whenever the Receive E3 Framer clears the FERF status, then it will do the following: 1. Generate a Change in the FERF Status Interrupt to the Microprocessor. 2. Clear the Bit 0 (RxFERF) within the Rx E3 Con- figuration & Status register, as depicted below. RXE3 CONFIGURATION & STATUS REGISTER - 1 G.751 (ADDRESS = 0X10) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Reserved RxFERF Algo Reserved RxBIP4 RO RO RO R/W RO RO RO R/W 00 000 000 RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used FERF Interrupt Status BIP-4 Error Interrupt Status Framing Error Interrupt Status Not Used RO RO RO RO RUR RUR RUR RUR 00 001 000 RXE3 CONFIGURATION & STATUS REGISTER - 2 (ADDRESS = 0X11) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 RxLOF Algo RxLOF RxOOF RxLOS RxAIS Not Used RxFERF R/W RORO RO RORORORO 01 100 000 |
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