| Electronic Components Datasheet Search |
|
XRT7250 Datasheet(PDF) 360 Page - Exar Corporation |
|
|
|||||||||||||||||||||||||||||
XRT7250 Datasheet(HTML) 360 Page - Exar Corporation |
|
360 / 463 page ![]() áç áç áç áç XRT7250 DS3/E3 FRAMER IC REV. 1.1.1 341 How to configure the XRT7250 into the Serial/ Loop-Timed/Non-Overhead Interface Mode 1. Set the NibIntf input pin "Low". 2. Set the TimRefSel[1:0] bit fields (within the Framer Operating Mode Register) to "00" as illus- trated below. 3. Interface the XRT7250, to the Terminal Equip- ment, as illustrated in Figure 157. 6.2.1.2 Mode 2 - The Serial/Local-Timed/ Frame-Slave Mode Behavior of the XRT7250 If the XRT7250 has been configured to operate in this mode, then the XRT7250 will function as follows. A. Local Timing - Uses the TxInClk signal as the Timing Reference In this mode, the Transmit Section of the XRT7250 will use the TxInClk signal as its timing reference. B. Serial Mode The XRT7250 will receive the E3 payload data, in a serial manner, via the TxSer input pin. The Transmit Payload Data Input Interface (within the XRT7250) will latch this data into its circuitry, on the rising edge of the TxInClk input clock signal. C. Delineation of Outbound E3 frames (Frame Slave Mode) The Transmit Section of the XRT7250 will use the Tx- InClk input as its timing reference, and will use the FIGURE 158. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK OF THE XRT7250 AND THE TERMINAL EQUIPMENT (FOR MODE 1 OPERATION) Terminal Equipment Signals E3_Clock_In E3_Data_Out Tx_Start_of_Frame E3_Overhead_Ind XRT7250 Transmit Payload Data I/F Signals RxOutClk TxSer TxFrame TxOH_Ind Payload[4238] Payload[4239] FA1, Bit 7 FA1, Bit 6 Payload[4238] Payload[4239] FA1, Bit 7 FA1, Bit 6 Note: The FA1 byte will not be processed by the Transmit Payload Data Input Interface. E3 Frame Number N E3 Frame Number N + 1 Note: RxFrame pulses high to denote E3 Frame Boundary. Note: TxOH_Ind pulses high for 16 bit periods in order to denote Overhead Data (e.g., the FA1 and FA2 bytes) FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) BIT 7BIT 6BIT 5BIT 4BIT 3BIT2 BIT 1 BIT 0 Local Loopback DS3/E3* Internal LOS Enable RESET Interrupt Enable Reset Frame Format TimRefSel[1:0] R/W R/W R/W R/W R/W R/W R/W R/W 00 1 0 1 0 0 0 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |