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XRT7250 Datasheet(PDF) 414 Page - Exar Corporation |
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XRT7250 Datasheet(HTML) 414 Page - Exar Corporation |
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414 / 463 page ![]() áç áç áç áç XRT7250 DS3/E3 FRAMER IC REV. 1.1.1 395 Finally, the Receive E3 Framer block will also inform the external circuitry of this transition to the LOF Con- dition state by toggling the RxLOF output pin “High”. 6.3.2.2 The Framing Maintenance Mode Once the Receive E3 Framer block enters the In- Frame state, then it will notify the Microprocessor/Mi- crocontroller of this fact by generating both the Change in OOF Condition and Change in LOF Condi- tion Interrupts. When this happens, bits 2 and 3 (LOF Interrupt Status and OOF Interrupt Status) will be set to “1”, as depicted below. Additionally, the Receive E3 Framer block will inform the external circuitry of its transition to the In-Frame state by toggling both the RxOOF and RxLOF output pins "Low”. Finally, the Receive E3 Framer block will negate both the RxOOF and the RxLOF bit-fields within the Rx E3 Configuration & Status Register, as depicted below. When the Receive E3 Framer block is operating in the In-Frame state, it will then begin to perform Frame Maintenance operations, where it will continue to ver- ify that the Frame Alignment octets (FA1, FA2) are present, at their proper locations. While the Receive E3 Framer block is operating in the Frame Mainte- nance Mode, it will declare an Out-of-Frame (OOF) Condition if it detects invalid Framing Alignment bytes in four consecutive frames. Since the Receive E3 Framer block requires the de- tection of invalid Frame Alignment bytes in four con- secutive frames, in order for it to transition to the OOF Condition state, it can tolerate some errors in the Framing Alignment bytes, and still remain in the In- Frame state. However, each time the Receive E3 Framer block detects an error in the Frame Alignment bytes, it will increment the PMON Framing Error Event Count Registers (Address = 0x52 and 0x53). The bit-format for these two registers are depicted be- low. RXE3 INTERRUPT STATUS REGISTER - 1 (ADDRESS = 0X14) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used COFA Interrupt Status OOF Interrupt Status LOF Interrupt Status LOS Interrupt Status AIS Interrupt Status RO RO RO RUR RUR RUR RUR RUR 0 0000 000 RXE3 INTERRUPT STATUS REGISTER - 1 (ADDRESS = 0X14) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used COFA Interrupt Status OOF Interrupt Status LOF Interrupt Status LOS Interrupt Status AIS Interrupt Status RO RO RO RUR RUR RUR RUR RUR 0 0001 100 RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Rx LOF Algo RxLOF RxOOF RxLOS RxAIS RxPld Unstab Rx TMark RxFERF R/W RORO RO RORORORO 0 1100 000 |
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