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XRT7250 Datasheet(PDF) 415 Page - Exar Corporation |
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XRT7250 Datasheet(HTML) 415 Page - Exar Corporation |
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415 / 463 page  XRT7250 áç áç áç áç DS3/E3 FRAMER IC REV. 1.1.1 396 6.3.2.3 Forcing a Reframe via Software Com- mand The XRT7250 Framer IC permits the user to com- mand a reframe procedure with the Receive E3 Fram- er block via software command. If the user writes a “1” into Bit 0 (Reframe) within the I/O Control Register (Address = 0x01), as depicted below, then the Re- ceive E3 Framer block will be forced into the FA1, FA2 Octet Search state, per Figure 194, and will begin its search for the “FA1” and “FA2” octets.) The Framer IC will respond to this command by doing the following. 1. Asserting both the RxOOF and RxLOF output pins. 2. Generating both the Change in OOF Status and the Change in LOF Status interrupts to the Micro- processor. 3. Asserting both the RxLOF and RxOOF bit-fields within the Rx E3 Configuration & Status Register, as depicted below. 6.3.2.4 Performance Monitoring of the Frame Synchronization Section, within the Receive E3 Framer block The user can monitor the number of framing bytes (FA1 and FA2 bytes) errors that have been detected by the Receive E3 Framer block. This is accom- PMON FRAMING BIT/BYTE ERROR COUNT REGISTER - MSB (ADDRESS = 0X52) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Framing Bit/Byte Error Count - High Byte RURRUR RUR RUR RURRUR RURRUR 00 000 000 PMON FRAMING BIT/BYTE ERROR COUNT REGISTER - LSB (ADDRESS = 0X53) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Framing Bit/Byte Error Count - Low Byte RURRUR RUR RUR RURRUR RURRUR 00 000 000 I/O CONTROL REGISTER (ADDRESS = 0X01) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Disable TxLOC LOC Disable RxLOC AMI/ ZeroSup* Unipolar/Bipo- lar* TxLine Clk Invert RxLine Clk Invert Reframe R/W RO R/W R/W R/W R/W R/W R/W 10 100 001 RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Rx LOF Algo RxLOF RxOOF RxLOS RxAIS RxPld Unstab Rx TMark RxFERF R/W RORO RO RORORORO 01 111 111 |
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