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XRT7250 Datasheet(PDF) 419 Page - Exar Corporation |
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XRT7250 Datasheet(HTML) 419 Page - Exar Corporation |
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419 / 463 page  XRT7250 áç áç áç áç DS3/E3 FRAMER IC REV. 1.1.1 400 • Set the Rx FERF bit-field, within the Rx E3 Configu- ration/Status Register to “1”, as depicted below. Clearing the FERF Condition The Receive E3 Framer block will clear the FERF condition once it has received a User-Selectable number of E3 frames is either 3 or 5 depending upon the value that has been written into Bit 4 (Rx FERF Algo) of the Rx E3 Configuration/Status Register, as discussed above. Whenever the Receive E3 Framer clears the FERF status, then it will do the following: 1. Generate a Change in the FERF Status Interrupt to the Microprocessor. 2. Clear the Bit 0 (RxFERF) within the Rx E3 Con- figuration & Status register, as depicted below. 6.3.2.7 Error Checking of the Incoming E3 Frames The Receive E3 Framer block performs error-check- ing on the incoming E3 frame data that it receives from the Remote Terminal Equipment. It performs this error-checking by computing the BIP-8 value of an incoming E3 frame. Once the Receive E3 Framer block has obtained this value, it will compare this val- ue with that of the “EM” byte that it receives, within the very next E3 frame. If the locally computed BIP-8 value matches the EM byte of the corresponding E3 frame, then the Receive E3 Framer block will con- clude that this particular frame has been properly re- ceived. The Receive E3 Framer block will then inform the Remote Terminal Equipment of this fact by having the Local Terminal Equipment Transmit E3 Framer block send the Remote Terminal an E3 frame, with the FEBE bit-field, within the MA byte, set to “0”. This procedure is illustrated in Figure 196 and Figure 197. Figure 196 illustrates the Local Receive E3 Framer receiving an error-free E3 frame. In this figure, the lo- cally computed BIP-8 value of “0x5A” matches that received from the Remote Terminal, within the EM byte-field. Figure 197 illustrates the subsequent ac- RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used TTB Change Interrupt Enable Not Used FEBE Interrupt Enable FERF Interrupt Enable BIP-8 Error Interrupt Enable Framing Byte Error Interrupt Enable RxPld Mis Interrupt Enable RO R/W RO R/W R/W R/W R/W R/W 00 001 000 RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Rx LOF Algo RxLOF RxOOF RxLOS RxAIS RxPld Unstab Rx TMark RxFERF R/W RORO RO RORORORO 00 000 001 RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Rx LOF Algo RxLOF RxOOF RxLOS RxAIS RxPld Unstab Rx TMark RxFERF R/W RORO RO RORORORO 00 000 001 |
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