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XRT7250 Datasheet(PDF) 423 Page - Exar Corporation

Part # XRT7250
Description  DS3/E3 FRAMER IC
PDF  463 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT7250 Datasheet(HTML) 423 Page - Exar Corporation

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XRT7250
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DS3/E3 FRAMER IC
REV. 1.1.1
404
The user can determine the number of BIP-8 Errors
that have been detected by the Receive E3 Framer
block, since the last read of these registers. These
registers are reset-upon-read.
6.3.2.8
Processing of the Far-End-Block Error
(FEBE) Bit-fields
Whenever the Receive E3 Framer detects an error in
the incoming E3 frame, via EM byte verification, it will
inform the Local Transmit E3 Framer of this fact. The
Local Transmit E3 Framer will, in turn, notify the Re-
mote Terminal (e.g., the source of the errored E3
frame) by transmitting an E3 frame, with the FEBE
bit-field (within the MA byte) set to “1”.
If the Receive E3 Framer receives any E3 frame, with
the FEBE bit-field set to “1”, then it will do the follow-
ing.
• It will generate a FEBE Event interrupt to the Micro-
processor/Microcontroller. Hence, the Receive E3
Framer block will set bit 4 (FEBE Interrupt Status)
within the Rx E3 Framer Interrupt Status Register -
2, as depicted below.
• Increment the PMON Received FEBE Event Count
register - MSB/LSB, which is located at 0x56 and
0x57 in the Framer Address space. The byte-for-
mat of these registers are presented below.
The user can determine the total number of FEBE
Events (e.g., E3 frames that have been received with
PMON PARITY ERROR COUNT REGISTER - LSB (ADDRESS = 0X55)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
Parity Error Count - Low Byte
RURRUR
RUR
RUR
RURRUR
RURRUR
00
000
000
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
Not Used
TTB Change
Interrupt Status
Not Used
FEBE Interrupt
Status
FERF Interrupt
Status
BIP-8 Error
Interrupt Status
Framing Byte
Error Interrupt
Status
RxPld Mis
Interrupt Status
RO
RUR
RO
RUR
RUR
RUR
RUR
RUR
0
0
0
1
000
0
PMON FEBE EVENT COUNT REGISTER - MSB (ADDRESS = 0X56)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
FEBE Event Count - High Byte
RURRUR
RUR
RUR
RURRUR
RURRUR
00
000
000
PMON FEBE EVENT COUNT REGISTER - LSB (ADDRESS = 0X57)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
FEBE Event Count - Low Byte
RURRUR
RUR
RUR
RURRUR
RURRUR
00
000
000



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