Final datasheet

13

Rev.2.5

2020-03-17

EiceDRIVER™ 2EDi product family

2EDSx reinforced, 2EDFx functional isolated 4A/8A, 1A/2A gate drivers

Functional description

3.6

Undervoltage Lockout

3.6.1

Input-side UVLO

During startup (rise of the input-side supply), as long as VDDI is below UVLO, no data is transferred to the output

side. All gate driver outputs are held low (Safety Lock-down at startup).

When VDDI exceeds the UVLO level, the PWM input signal is transferred to the output side. If the output side is

ready (not in UVLO condition), the output reacts according to the logic input. At any time, if the VDDI voltage

drops below the UVLO threshold, an immediate “switch-to-low” command is sent to all output channels. The

gate driver outputs are held low (Safety Lock-down is active at missing VDDI supply).

3.6.2

Output-side UVLO

The Undervoltage Lockout function (UVLO) ensures that the output can be switched to its high level only if the

gate driver supply voltage exceeds the UVLO threshold voltage. Thus it can be guaranteed, that the power switch

transistors always stay within their Safe Operating Area (SOA). Otherwise a too low driving voltage could cause

the power MOSFET to enter its saturation (ohmic) region with potentially destructive power dissipation.

The UVLO of each channel VDDA/VDDB is controlled independently. There is no feedback to the input side.

3.7

Data transmission input-side to output-side

Coreless Transformer (CT) based communication modules situated on the input die are used for signal transfer

between input and output devices. A proven high-resolution pulse repetition scheme in the transmitter

combined with a watchdog time-out at the receiver side enables recovery from communication fails and ensures

safe system shutdown in failure cases.

3.8

Dead Time Control

feature is used in half-bridge applications to prevent the switches from a shoot-through current due to

overlapping or jitter on the PWM signals.

If the DTC feature is available, it can be enabled by connecting a resistor from DTC to GND. If this pin is not

connected or set to VDDI, DTC is disabled.

The resistor values and dead time delays are shown in Table 17 and Figure 15.