8.3 Feature Description

The ISO672xB family of devices is available in two channel configurations and default output state options to

enable a variety of application uses. Table 8-1 lists the device features of the ISO672xB devices.

Table 8-1. Device Features

PART NUMBER

MAXIMUM DATA

RATE

CHANNEL DIRECTION

DEFAULT OUTPUT

STATE

PACKAGE

RATED ISOLATION(1)

ISO6721B

50 Mbps

1 Forward, 1 Reverse

High

D-8

ISO6721FB

50 Mbps

1 Forward, 1 Reverse

Low

D-8

(1)

See Section 6.8 for detailed isolation ratings.

8.3.1 Electromagnetic Compatibility (EMC) Considerations

Many applications in harsh industrial environment are sensitive to disturbances such as electrostatic discharge

(ESD), electrical fast transient (EFT), surge and electromagnetic emissions. These electromagnetic disturbances

are regulated by international standards such as IEC 61000-4-x and CISPR 22. Although system-level

performance and reliability depends, to a large extent, on the application board design and layout, the ISO672xB

family of devices incorporates many chip-level design improvements for overall system robustness. Some of

these improvements include:

• Robust ESD protection cells for input and output signal pins and inter-chip bond pads.

• Low-resistance connectivity of ESD cells to supply and ground pins.

• Enhanced performance of high voltage isolation capacitor for better tolerance of ESD, EFT and surge events.

• Bigger on-chip decoupling capacitors to bypass undesirable high energy signals through a low impedance

path.

• PMOS and NMOS devices isolated from each other by using guard rings to avoid triggering of parasitic

SCRs.

• Reduced common mode currents across the isolation barrier by ensuring purely differential internal operation.

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ISO6721

SLLSFJ0 – JULY 2020

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