DS1678 Real-Time Event Recorder

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EVENT COUNTER REGISTER (3Ah–3Ch)

This three-byte register set provides the number of events that have been logged during the current data-

logging operation (also known as a “mission”). The contents of this register can be used by software to

point to the most recent data sample in the event-log memory. The data in these registers are cleared

when the event-log memory is cleared. The event counter is not incremented when the ETC reaches

FFFFh and rolls over to the next 16 bits of memory.

ADDRESS POINTER REGISTER (3Fh–40h)

The address pointer register always contains the address that the next data LSB is written to in the event-

log memory. The address pointer registers are located in the main memory map at LSB (3Fh) and MSB

(40h). These are helpful in recovering all the data if a rollover occurs. The address pointer points to the

oldest event in the memory after a rollover. This is the memory location that would be overwritten by the

next event. Read the data from this point to the end of the memory and the start time stamp, including the

two-byte ETC from the last event to recover all the data in the correct order.

GLITCH-CONTROL CIRCUIT

The DS1678 has a built-in glitch-control circuit to filter noise on

INT from triggering false events. A

minimum of one internal clock cycle (0.122ms) up to a maximum of two internal clock cycles (0.245ms)

are required to recognize a transition on the input as an event. An event then requires an additional six to

eight internal clock cycles (0.752ms to 0.977ms) to be processed and recorded into memory. This means

that the minimum event occurrence that can be recognized by the DS1678 requires seven to 10 internal

clock cycles (0.854ms to 1.22ms). Failure to ensure this timing causes the event to be ignored. Thus, it is

recommended that you design with the maximum timing specs. See Figure 5.

INT has a weak internal pulldown resistor to prevent the pin from floating if the signal connected to the

pin is tri-stated. Without the resistor, the input would float and potentially log phantom events. With the

pulldown resistor, the pin can be transitioned to a low state, causing an event to be recorded if

INT is held

high by an outside signal that becomes tri-stated.

Figure 5. Event Recognition Timing

TRANSITION

POINT

TRANSITION

POINT

TRANSITION

POINT

TRANSITION

POINT

TRANSITION

POINT

EVENT ON BOTH EDGES

GLITCH

t

GLITCH

t

EVENT

t

INT

INT

BAD EVENT 2

EVENT 2

IS MISSED

EVENT 1

BAD EVENT 1

INT

EVENT

t

GOOD EVENTS

EVENT 2

EVENT 1

EVENT ON RISING EDGE

GLITCH

t

GLITCH

t

EVENT

t

INT

INT

BAD EVENT 2

EVENT 2

IS MISSED

EVENT 1

TRANSITION

POINT

BAD EVENT 1

INT

EVENT

t

GOOD EVENTS

EVENT 2

EVENT 1