VSC7440 datasheet(225/444 Pages) MICROSEMI

225 / 444 page

Functional Descriptions

VMDS-10492 VSC7440 Datasheet Revision 4.2

208

Tx-mirrored traffic sent to the mirror port is modified according to a configured Tx port

(REW:COMMON:MIRROR_PROBE_CFG.MIRROR_TX_PORT) optionally with an additional Q-tag

(enabled in REW::MIRROR_PROBE_CFG.REMOTE_MIRROR_CFG).

For information about possible rewriter options for mirrored frames, see Mirror Frames, page 269.

Example: Ingress port mirroring in specific VLAN

All traffic only in VLAN 3 from host B on port 3 (the probe port) is mirrored to port 11 (the mirror port)

using probe 1, as shown in the following illustration.

Figure 52 •

Ingress Mirroring in Specific VLAN

The following configuration is required:

•

Enable RX mirroring on port 3:

ANA_AC:MIRROR_PROBE[1].PROBE_CFG.PROBE_DIRECTION = 2 (= Rx only)

ANA_AC:MIRROR_PROBE[1].PROBE_PORT_CFG = 0x8 (port 3)

•

Enable VID filtering:

ANA_AC:MIRROR_PROBE[1].PROBE_CFG.PROBE_VLAN_MODE = 2

ANA_AC:MIRROR_PROBE[1].PROBE_CFG. PROBE_VID = 3

•

Setup mirror port: QFWD:SYSTEM:FRAME_COPY_CFG[10].FRMC_PORT_VAL 11

3.24

Shared Queue System and Hierarchical Scheduler

The device includes a shared queue system with a per-port ingress queue and 3,358 shared egress

queues. The shared queue system has 8 megabits of buffer. It receives frames from 15 ports, stores

them in a shared packet memory, and transmits them towards 15 destination ports. The first 11 ports are

assigned directly to a specific front port, whereas the last four ports are internal ports.

Table 134 •

Port Definitions in Shared Queue System

Ports

Connection

0 – 8

Front port, maximum bandwidth is 1 Gbps or 2.5 Gbps.

9 – 10

Front port, maximum bandwidth is 10 Gbps.

11 – 12

Frame injection and extraction CPU ports. The CPU connects these ports to DMA logic or to a register

interface.

IP multicast loopback port (VD0).

When the queue system is requested to transmit to VD0, it generates multiple copies. All copies are,

outside the queue system, looped back into the analyzer. The rewriter changes the ingress port number to

VD0 before the loop. The analyzer generates a routed version of each of the frame copies coming from

VD0.

Switch

Host A

Host B

Host C

Network Analyzer

VLAN 2

VLAN 3

VSC7440 Datasheet(PDF) 225 Page - Microsemi Corporation

VSC7440 Datasheet(HTML) 225 Page - Microsemi Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL