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VSC7440 Datasheet(PDF) 236 Page - Microsemi Corporation

Part # VSC7440
Description  L2/L3 Enterprise Gigabit Ethernet Switch with 10 Gbps Links
PDF  444 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

VSC7440 Datasheet(HTML) 236 Page - Microsemi Corporation

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Functional Descriptions
VMDS-10492 VSC7440 Datasheet Revision 4.2
219
3.24.4.6 Frame Forwarder Monitoring
The performance of the frame forwarder can be monitored through the registers listed in the following
table.
3.24.5
Queue Mapping
When a frame is forwarded to an egress port, a frame reference is inserted into one of the port’s egress
queues. The egress queues are read by a programmable scheduler consisting of a number of scheduler
elements (SEs). Each SE serves 8 or 16 queues, configurable through the HSCH::HSCH_LARGE_ENA
registers. Each SE selects the next input to transmit and forwards the decision to a next-layer SE,
selecting from which of its inputs to transmit. There are a total of three layers, with layer 0 being the
queue connected layer. Connections between the layers are fully configurable in HSCH::L0_CFG and
HSCH::L1_CFG. For more information about SE functionality, see Scheduling, page 225 and Bandwidth
Control, page 226.
The scheduler includes a dual leaky bucket shaper to limit the traffic rate from inputs attached to it. To
distribute the bandwidth between the inputs, the scheduler also contains a weighted round robin arbiter.
The number of queues available in total for all ports is 3,358. The queue mapper must be configured to
how these queues are assigned to each egress port. The overall traffic management for each port is the
result of the queue mapping and scheduler hierarchy.
The following illustration shows an example of the default egress port hierarchy. At layer 0, eight SEs
select between data in the same QoS level, with queues from each source port. This forms a basic traffic
manager, where all source ports are treated fair between each other, and higher priorities are preferred.
This is accomplished by having the layer 0 SEs select input in a round robin fashion, and the mid-layer
select strictly higher inputs before lower inputs. In general, all SEs can be configured to various polices
on how to select inputs.
QRES::RES_STAT_CUR (replicated
as RES_CFG)
Returns current value this threshold is being compared with.
QRES::WRED_PROFILE (72 profiles) Profile description. There are 3 (grp) × 3 (DP) × 8 (prio) profiles.
QRES::WRED_GROUP
WRED group membership configuration per port.
QRES::PFC_CFG
Enable PFC per port.
QRES::RES_QOS_MODE
Enable QoS reservation for QoS classes.
QFWD::SWITCH_PORT_MODE
Controls whether yellow traffic can use reserved space (YEL_RSVD). Allows
ports to use shared space (IGR_NO_SHARING, EGR_NO_SHARING).
Table 149 •
Frame Forwarder Monitoring Registers Overview
Register
Description
QFWD::FWD_DROP_EVENTS
Sticky bits per port telling if drops from each individual ingress port
occurred.
QFWD::FWD_CPU_DROP_CNT
Counts number of frames not forwarded to the CPU due to congestion.
QFWD::FWD_STAT_CNT
Counts number of frame copies added to the egress queues in total.
QFWD::FWD_PRESS_DROP_CNT
Counts number of frame copies discarded due to forward pressure.
Value is the total discards across all ports.
QSYS::MMGT_IQ_STAT
Returns current ingress queue size.
QSYS::MMGT
Returns number of free references for the egress queues.
Table 148 •
Congestion Control Registers Overview (continued)
Register
Description



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