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VSC7440 Datasheet(PDF) 271 Page - Microsemi Corporation

Part # VSC7440
Description  L2/L3 Enterprise Gigabit Ethernet Switch with 10 Gbps Links
PDF  444 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

VSC7440 Datasheet(HTML) 271 Page - Microsemi Corporation

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Functional Descriptions
VMDS-10492 VSC7440 Datasheet Revision 4.2
254
3.26.5.1 Rewriter Pipeline Handling
In order to achieve the correct statistics and processing of frames, it is important that frames can be
extracted, injected, discarded, and looped at specific positions in the processing flow. Based on the
position, processing—especially counters, are affected. For information about how pipeline points are
used in the processing flow, see Pipeline Points, page 67.
Note that a frame is always physically passed through the entire processing. Logically, certain elements
of the processing can be disabled or enabled.
OAM_MEP_IDX_VL
D
Setting this bit to 1 causes the OAM_MEP_IDX to be used.
1
OAM_MEP_IDX
OAM MEP index.
8
OAM_MEP_IDX_P
OAM MEP index to use when enabled by PROTECTION_SEL.
8
OAM_LM_COSID_
COLOR_SEL
0: Mapped using mapping table 0 if valid, otherwise use value 0.
1: Mapped using mapping table 1 if valid, otherwise use mapping table 0.
2: Mapped using mapping table 2 if valid, otherwise use value 0.
3: Mapped using mapping table 3 if valid, otherwise use mapping table 2.
2
INDEPENDENT_
MEL_ENA
OAM MEL mode.
1
MIP_IDX
Ethernet MIP index.
0: Disable.
Other: MIP index value.
7
FWD_SEL
ES0 Forward selector.
0: No action.
1: Copy to loopback interface.
2: Redirect to loopback interface.
3: Discard.
2
CPU_QU
CPU extraction queue. Used when FWD_SEL >0 and PIPELINE_ACT = XTR.
3
PIPELINE_PT
ES0 pipeline point.
0: REW_IN_SW.
1: REW_OU_SW.
2: REW_SAT.
3: Reserved.
2
PIPELINE_ACT
Pipeline action when FWD_SEL >0.
0: XTR. CPU_QU selects CPU extraction queue
1: LBK_ASM.
1
SWAP_MAC_ENA
This setting is only active when FWD_SEL = 1 or FWD_SEL = 2 and
PIPELINE_ACT = LBK_ASM.
0: No action.
1: Swap MACs and clear bit 40 in new SMAC.
1
LOOP_ENA
Setting LOOP_ENA overrides the other pipeline control settings.
0: Forward based on PIPELINE_PT and FWD_SEL
1: Force FWD_SEL=REDIR, PIPELINE_ACT = LBK_ASM,
PIPELINE_PT = REW_SAT, swap MACs and clear bit 40 in new SMAC. Do not
apply CPU_QU.
1
Table 172 •
VCAP_ES0 Actions (continued)
Field Name
Description
Width



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