VSC7440 datasheet(395/444 Pages) MICROSEMI

395 / 444 page

Electrical Specifications

VMDS-10492 VSC7440 Datasheet Revision 4.2

378

The following illustration shows jitter transfer curves from REFCLK and REFCLK2 to all high-speed

outputs.

Figure 134 •

REFCLK/REFCLK2 Jitter Transfer Curves

REFCLK2 frequency

REFCLK2_CONF = 010

–100 ppm 250

100 ppm

MHz

Clock duty cycle

Measured at 50%

threshold.

Rise time and fall time, differential mode tR, tF

0.5

Within ±200 mV

relative to VDD × 2/3.

Jitter transfer from REFCLK to

SERDES10G, bandwidth from 12 kHz to

1MHz

0.3

Jitter transfer from REFCLK to

SERDES10G, bandwidth from 1 MHz to

7MHz

2dB

Jitter transfer from REFCLK to

SERDES10G, bandwidth above 7 MHz

2 – 20 × log

(ƒ/7 MHz)

REFCLK2 input RMS jitter, 12 kHz to

10 MHz

1psRMS

Table 289 •

REFCLK2 Reference Clock (continued)

Parameter

Symbol Minimum

Typical Maximum Unit

Condition

3 dB

0 dB

–3 dB

–6 dB

–9 dB

–12 dB

–15 dB

–18 dB

–21 dB

–24 dB

0.001 MHz

0.01 MHz

0.1 MHz

Frequency (MHz)

Gain vs. REFCLK/REFCLK2 Frequency

1 MHz

10 MHz

100 MHz

156.25 MHz

250 MHz

25 MHz

125 MHz

VSC7440 Datasheet(PDF) 395 Page - Microsemi Corporation

VSC7440 Datasheet(HTML) 395 Page - Microsemi Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL