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VSC7511 Datasheet(PDF) 132 Page - Microsemi Corporation |
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VSC7511 Datasheet(HTML) 132 Page - Microsemi Corporation |
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132 / 324 page  Functional Descriptions VMDS-10488 VSC7511 Datasheet Revision 4.2 117 3.9.3.7 sFlow Sampling This process step handles sFlow sampling. The following table lists the registers associated with sFlow sampling. sFlow is a standard for monitoring high-speed switch networks through statistical sampling of incoming and outgoing frames. Each port in the device can be setup as an sFlow agent monitoring the particular link and generating sFlow data. If a frame is sFlow sampled, it is copied to the sFlow CPU extraction queue (CPUQ_SFLOW). An sFlow agent is configured through SFLOW_CFG with the following options: • SF_RATE specifies the probability that the sampler copies a frame to the CPU. Each frame being candidate for the sampler has the same probability of being sampled. The rate is set in steps of 1/4096. • SF_SAMPLE_RX enables incoming frames on the port as candidates for the sampler. • SF_SAMPLE_TX enables outgoing frames on the port as candidates for the sampler. The Rx and Tx can be enabled independently. If both are enabled, all incoming and outgoing traffic on the port is subject to the statistical sampling given by the rate in SF_RATE. 3.9.3.8 Mirroring This processing step handles mirroring. The following table lists the registers associated with mirroring. Frames subject to mirroring are identified based on the following mirror probes: • Learn mirroring if ADVLEARN.LEARN_MIRROR is set and frame is a learn frame. • CPU mirroring if AGENCTRL.MIRROR_CPU is set and the CPU port is set in DEST. • Ingress mirroring if PORT_CFG.SRC_MIRROR_ENA is set. • Egress mirroring if any port set in EMIRRORMASK is also set in DEST. • VLAN mirroring if VLAN_MIRROR set in the VLAN table entry. • VCAP mirroring if an action is hit that requires mirroring. Table 92 • sFlow Sampling Registers Register Description Replication SFLOW_CFG Configures sFlow samplers (type and rates). Per port CPUQ_CFG.CPUQ_SFLOW CPU extraction queue for sFLow sampled frames. None Table 93 • Mirroring Registers Register Description Replication ADVLEARN.LEARN_MIRROR For learn frames, ports in this mask (mirror ports) are added to DEST. None AGENCTRL.MIRROR_CPU Mirror all frames forwarded to the CPU port module. None PORT_CFG.SRC_MIRROR_ENA Mirror all frames received on an ingress port (ingress port mirroring). Per port EMIRRORMASK Mirror frames that are to be transmitted on any ports set in this mask (egress port mirroring). None VLANTIDX.VLAN_MIRROR Mirror all frames classified to a specific VID. Per VLAN IS2_ACTION.MIRROR_ENA Mirror when an IS2 action is hit. Per VCAP IS2 entry MIRRORPORTS When mirroring a frame, ports in this mask are added to DEST. None AGENCTRL.CPU_CPU_KILL_ENA Clear the CPU port if source port is the CPU port and the CPU port is set in DEST. None |
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