AS7C4096A-15JC datasheet(4/10 Pages) ALSC

4 / 10 page

AS7C4096A

5/27/05, v. 1.1

Alliance Semiconductor

P. 4 of 10

Key to switching waveforms

Read waveform 1 (address controlled)2,5,6,8

Read waveform 2 (CE, OE controlled)2,5,7,8

Read cycle (over the operating range)2,8

Parameter

Symbol

–10

–12

–15

–20

Unit Notes

Min

Max

Min

Max

Min

Max

Min

Max

Read cycle time

tRC

–12–

–

Address access time

tAA

–10

–

15–20

Chip enable (CE) access time

tACE

–10

–

15–20

Output enable (OE) access time

tOE

–5–

6–6–6

Output hold from address change

tOH

3–3

–3–3–

CE Low to output in low Z

tCLZ

3–3

–3–3–

3,4

CE High to output in high Z

tCHZ

–5–

6–7–9

3,4

OE Low to output in low Z

tOLZ

0–0

–0–0–

3,4

OE High to output in high Z

tOHZ

–5–

6–7–9

3,4

Power up time

tPU

0–0

–0–0–

3,4

Power down time

tPD

–10

–

15–20

3,4

Undefined/don’t care

Falling input

Rising input

Address

DOUT

Data valid

tOH

tAA

tRC

current

Supply

DOUT

tOE

tOLZ

tACE

tCHZ

tCLZ

tPU

tPD

ICC

ISB

50%

tOHZ

Data valid

tRC1

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