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X520-DA2 Datasheet(PDF) 3 Page - Intel Corporation |
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X520-DA2 Datasheet(HTML) 3 Page - Intel Corporation |
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3 / 5 page ![]() Features Benefits GENERAL Intel® 82599 10 Gigabit Ethernet Controller Industry-leading, energy-efficient design for next-generation 10 Gigabit performance and multi-core processors. SFP+ Connectivity Intel® Ethernet Server Adapter X520 Series for OCP with SFP+ connections support 10GBASE-SR, 10GBASE-LR and SFP+ Copper Direct Attach physical media. OCP Form Factor • Supports the OCP form factor for Server specifications revision 2 iSCSI Remote Boot v3.0 • Enables system boot-up via iSCSI • Provides additional network management capability RoHS-compliant • Complies with the European Union directive 2002/95/EC to reduce the use of hazardous materials Time Sync (IEEE 1588*, 802.1as) • Enables networked Ethernet equipment to synchronize internal clocks according to a network mas- ter clock; endpoint can then acquire an accurate estimate of the master time by compensating for link latency. Low Halogen • Leadership in an environmentally friendly ecosystem SMBus or NC-SI enabled • Provides out of band (OOB) network access I/O FEATURES FOR MULTI-CORE PROCESSOR SERVERS Intel® Data Direct I/O (Intel® DDIO) • Reduces memory accesses from I/O on local socket • Speeds up CPU data transfer • Accelerates inbound & outbound data flows Intel® Ethernet Flow Director • Intel Ethernet Flow Director and ATR can significantly lower latency and improve CPU utilization by pre- serving the affinity between the flow and the core where the application resides RSS - Receive Side Scaling • Uses multiple queues for receive traffic MSI-X support • Minimizes the overhead of interrupts • Load-balancing of interrupt handling between multiple cores/CPUs Low Latency Interrupts (LLI) • Based on the sensitivity of the incoming data, the adapter can bypass the automatic moderation of time intervals between the interrupts Multiple Queues: 128 Tx and Rx queues per port • Network packet handling without waiting or buffer overflow providing efficient packet prioritization Tx/Rx IP, SCTP, TCP, and UDP checksum offloading (IPv4, IPv6) capabilities • Lower processor usage • Checksum and segmentation capability extended to new standard packet type TxTCP segmentation offload (IPv4, IPv6) • Increased throughput and lower processor usage Interrupt Throttle Rate (ITR) • ITR parameter controls how many interrupts each interrupt vector can generate per second. Jumbo frames • Supports jumbo frames larger then default 1500 Large Receive Offload (LRO) • Combines multiple Ethernet frames into a single receive in the stack, thereby potentially decreasing CPU usage for receives MAC and VLAN anti-spoofing • If a malicious driver attempts to send a spoofed packet, it is dropped by the hardware and not transmit- ted. An interrupt is sent to the PF driver notifying it of the spoof attempt. Flow Control • Ethernet Flow Control (IEEE 802.3x) support for capable link partner HW based receive side coalescing (RSC) • Merges multiple frames from the same IPv4 TCP/IP flow into a single structure that can span one or more descriptors. Virtualization Features PC-SIG SR-IOV Implementation (up to 64 virtual functions per port) • Provides an implementation of the PCI-SIG standard for I/O Virtualization. The physical configuration of each port is divided into multiple virtual ports. Each virtual port is assigned to an individual virtual ma- chine directly by bypassing the virtual switch in the Hypervisor, resulting in near-native performance. • Integrated with Intel® VT for Directed I/O (Intel® VT-d) to provide data protection between virtual ma- chines by assigning separate physical addresses in the memory to each virtual machine Advanced Packet Filtering • 24 exact-matched packets (unicast or multicast) • 4096-bit hash filter for unicast and multicast frames • Lower processor usage • Promiscuous (unicast and multicast) transfer mode support • Optional filtering of invalid frames VLAN support with VLAN tag insertion, stripping and packet filtering for up to 4096 VLAN tags • Ability to create multiple VLAN segments |
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