PIC16F913 datasheet(127/272 Pages) MICROCHIP

127 / 272 page

Preliminary

DS41250E-page 125

PIC16F917/916/914/913

10.0

PROGRAMMABLE

LOW-VOLTAGE DETECT

(PLVD) MODULE

The Programmable Low-Voltage Detect module is an

interrupt driven supply level detection. The voltage

detection monitors the internal power supply.

10.1

Voltage Trip Points

The PIC16F917/916/914/913 device supports eight

internal PLVD trip points. See Register 10-1 for avail-

able PLVD trip point voltages.

10.1.1

PLVD CALIBRATION

The PIC16F91X stores the PLVD calibration values in

fuses located in the Calibration Word 2 (2009h). The

Calibration Word 2 is not erased when using the spec-

ified bulk erase sequence in the “PIC16F91X Memory

Programming Specification” (DS41244) and thus, does

not require reprogramming.

LVDCON – LOW-VOLTAGE DETECT CONTROL REGISTER (ADDRESS: 109h)

U-0

R-0

R/W-0

U-0

R/W-1

R/W-0

—

—IRVST

LVDEN

—

LVDL2

LVDL1

LVDL0

bit 7

bit 0

bit 7-6

Unimplemented: Read as ‘0’

bit 5

IRVST: Internal Reference Voltage Stable Status Flag bit(1)

= Indicates that the PLVD is stable and PLVD interrupt is reliable

= Indicates that the PLVD is not stable and PLVD interrupt should not be enabled

bit 4

LVDEN: Low-Voltage Detect Power Enable bit

= Enables PLVD, powers up PLVD circuit and supporting reference circuitry

= Disables PLVD, powers down PLVD and supporting circuitry

bit 3

Unimplemented: Read as ‘0’

bit 2-0

LVDL<2:0>: Low-Voltage Detection Limit bits (nominal values)

111

= 4.5V

110

= 4.2V

101

= 4.0V

100

= 2.3V (default)

011

= 2.2V

010

= 2.1V

001

= 2.0V

000

= 1.9V(2)

Note 1: The IRVST bit is usable only when the HFINTOSC is running. When using an

external crystal to run the microcontroller, the PLVD settling time is expected to be

<50

μs when VDD = 5V and <25 μs when VDD = 3V. Appropriate software delays

should be used after enabling the PLVD module to ensure proper status readings

of the module.

2: Not tested and below minimum VDD.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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