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PIC16F913 Datasheet(PDF) 152 Page - Microchip Technology |
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PIC16F913 Datasheet(HTML) 152 Page - Microchip Technology |
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152 / 272 page ![]() PIC16F917/916/914/913 DS41250E-page 150 Preliminary © 2005 Microchip Technology Inc. FIGURE 12-4: ANALOG INPUT MODEL 12.3 A/D Operation During Sleep The A/D converter module can operate during Sleep. This requires the A/D clock source to be set to the internal oscillator. When the RC clock source is selected, the A/D waits one instruction before starting the conversion. This allows the SLEEP instruction to be executed, thus eliminating much of the switching noise from the conversion. When the conversion is complete, the GO/DONE bit is cleared and the result is loaded into the ADRESH:ADRESL registers. If the A/D interrupt is enabled, the device awakens from Sleep. If the GIE bit (INTCON<7>) is set, the program counter is set to the interrupt vector (0004h). If GIE is clear, the next instruction is executed. If the A/D interrupt is not enabled, the A/D module is turned off, although the ADON bit remains set. When the A/D clock source is something other than RC, a SLEEP instruction causes the present conversion to be aborted, and the A/D module is turned off. The ADON bit remains set. FIGURE 12-5: A/D TRANSFER FUNCTION CPIN VA RS ANx 5 pF VDD VT = 0.6V VT = 0.6V I LEAKAGE RIC ≤ 1k Sampling Switch SS RSS CHOLD = DAC capacitance VSS 6V Sampling Switch 5V 4V 3V 2V 567 8 9 10 11 (k Ω) VDD = 10 pF ± 500 nA Legend: CPIN VT I LEAKAGE RIC SS CHOLD = Input Capacitance = Threshold Voltage = Leakage current at the pin due to = Interconnect Resistance = Sampling Switch = Sample/Hold Capacitance (from DAC) various junctions RSS 3FFh 3FEh 3FDh 3FCh 004h 003h 002h 001h 000h Full-Scale 3FBh 1/2 LSB Ideal Zero-Scale Zero-Scale Transition 1/2 LSB Ideal Transition Center of Full-Scale Code 1 LSB Ideal Full-Scale Range Analog Input |
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