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PIC16F913 Datasheet(PDF) 153 Page - Microchip Technology |
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PIC16F913 Datasheet(HTML) 153 Page - Microchip Technology |
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153 / 272 page  © 2005 Microchip Technology Inc. Preliminary DS41250E-page 151 PIC16F917/916/914/913 12.4 Effects of Reset A device Reset forces all registers to their Reset state. Thus, the A/D module is turned off and any pending conversion is aborted. The ADRESH:ADRESL registers are unchanged. TABLE 12-2: SUMMARY OF A/D REGISTERS Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets 05h PORTA RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 xxxx xxxx uuuu uuuu 09h PORTE — — — —RE3 RE2 RE1 RE0 ---- xxxx ---- uuuu 0Bh/ 8Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000x 0Ch PIR1 EEIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 1Eh ADRESH Most Significant 8 bits of the left justified A/D result or 2 bits of the right justified result xxxx xxxx uuuu uuuu 1Fh ADCON0 ADFM VCFG1 VCFG0 CHS2 CHS1 CHS0 GO/DONE ADON 0000 0000 0000 0000 85h TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 1111 1111 1111 1111 89h TRISE — — — — TRISE3 TRISE2 TRISE1 TRISE0 ---- 1111 ---- 1111 8Ch PIE1 EEIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 91h ANSEL ANS7 ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0 1111 1111 1111 1111 9Eh ADRESL Least Significant 2 bits of the left justified A/D result or 8 bits of the right justified result xxxx xxxx uuuu uuuu 9Fh ADCON1 — ADCS2 ADCS1 ADCS0 — — — — -000 ---- -000 ---- Legend: x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used for A/D module. |
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