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PIC16F913 Datasheet(PDF) 196 Page - Microchip Technology |
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PIC16F913 Datasheet(HTML) 196 Page - Microchip Technology |
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196 / 272 page ![]() PIC16F917/916/914/913 DS41250E-page 194 Preliminary © 2005 Microchip Technology Inc. TABLE 16-5: INITIALIZATION CONDITION FOR SPECIAL REGISTERS LCDDATA3 113h xxxx xxxx uuuu uuuu uuuu uuuu LCDDATA4 114h xxxx xxxx uuuu uuuu uuuu uuuu LCDDATA5 115h xxxx xxxx uuuu uuuu uuuu uuuu LCDDATA6 116h xxxx xxxx uuuu uuuu uuuu uuuu LCDDATA7 117h xxxx xxxx uuuu uuuu uuuu uuuu LCDDATA8 118h xxxx xxxx uuuu uuuu uuuu uuuu LCDDATA9 119h xxxx xxxx uuuu uuuu uuuu uuuu LCDDATA10 11Ah xxxx xxxx uuuu uuuu uuuu uuuu LCDDATA11 11Bh xxxx xxxx uuuu uuuu uuuu uuuu LCDSE0 11Ch 0000 0000 uuuu uuuu uuuu uuuu LCDSE1 11Dh 0000 0000 uuuu uuuu uuuu uuuu LCDSE2 11Eh 0000 0000 uuuu uuuu uuuu uuuu EECON1 18Ch x--- x000 u--- q000 u--- uuuu Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition. Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently. 2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up). 3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 4: See Table 16-5 for Reset value for specific condition. 5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u. TABLE 16-4: INITIALIZATION CONDITION FOR REGISTERS (CONTINUED) Register Address Power-on Reset • MCLR Reset • WDT Reset • Brown-out Reset(1) • Wake-up from Sleep through interrupt • Wake-up from Sleep through WDT time-out Condition Program Counter Status Register PCON Register Power-on Reset 000h 0001 1xxx --01 --0x MCLR Reset during normal operation 000h 000u uuuu --0u --uu MCLR Reset during Sleep 000h 0001 0uuu --0u --uu WDT Reset 000h 0000 uuuu --0u --uu WDT Wake-up PC + 1 uuu0 0uuu --uu --uu Brown-out Reset 000h 0001 1uuu --01 --10 Interrupt Wake-up from Sleep PC + 1(1) uuu1 0uuu --uu --uu Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’. Note 1: When the wake-up is due to an interrupt and Global Interrupt Enable bit, GIE, is set, the PC is loaded with the interrupt vector (0004h) after execution of PC + 1. |
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