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Toggles with OE or CE only for erasing or erase suspended sector addresses.

‡

Toggles only if DQ5 = 1 and address applied is within sector that exceeded timing limits.

DQ8–DQ15 = Don’t care in ×16 mode.

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Status

DQ7

DQ6

DQ5

DQ3

DQ2

RY/BY

In progress

Auto programming (byte/word)

DQ7

Toggle

0

0

No toggle

0

Program/erase in auto erase

0

Toggle

0

1

0

Erase

suspend

mode

Read erasing sector

1

No toggle

0

0

Toggle

1

Read non-erasing

sector

Data

Data

Data

Data

Data

1

Program in erase

suspend

DQ7

Toggle

0

0

Toggle

†

0

Exceeded time limits

Auto programming (byte/word)

DQ7

Toggle

1

NA

No toggle

1

Program/erase in auto erase

0

Toggle

1

1

Toggle

‡

1

Program in erase suspend

DQ7

Toggle

1

NA

1

Item

Description

Reset/Read

Initiate read or reset operations by writing the Read/Reset command sequence into the command

register. This allows the microprocessor to retrieve data from the memory. Device remains in read

mode until command register contents are altered.

Device automatically powers up in read/reset state. This feature allows only reads, therefore

ensuring no spurious memory content alterations during power up.

ID Read

AS29F200 provides manufacturer and device codes in two ways. External PROM programmers

typically access the device codes by driving +12V on A9. AS29F200 also contains an ID read

command to read the device code with only +5V, since multiplexing +12V on address lines is

generally undesirable.

Initiate device ID read by writing the ID Read command sequence into the command register.

Follow with a read sequence from address XX00h to return MFG code. Follow ID read command

sequence with a read sequence from address XX01h to return device code.

To verify write protect status on sectors, read address XX02h. Sector addresses A16–A12 produce a

1 on DQ0 for protected sector and a 0 for unprotected sector.

Exit from ID read mode with Read/Reset command sequence.

Hardware Reset

Holding RESET low for 500 ns resets the device, terminating any operation in progress; data

handled in the operation is corrupted. The internal state machine resets 20 µs after RESET is driven

low. RY/BY remains low until the RESET operation is completed. After RESET is set high, there is a

delay of 1.5 µs for the device to permit read operations.