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ASM2I99446 Datasheet(PDF) 5 Page - Alliance Semiconductor Corporation

Part # ASM2I99446
Description  2.5V and 3.3V LVCMOS Clock Distribution Buffer
PDF  14 Pages
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

ASM2I99446 Datasheet(HTML) 5 Page - Alliance Semiconductor Corporation

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July 2005
ASM2I99446
rev 0.4
2.5V and 3.3V LVCMOS Clock Distribution Buffer
5 of 14
Notice: The information in this document is subject to change without notice.
Table 7: AC CHARACTERISTICS (V
CC = VCCA = VCCB = VCCC = 3.3V ±5%, TA = –40°C to +85°C)
1
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
fref
Input Frequency
0
250
2
MHz
fMAX
Maximum Output Frequency
÷1 output
÷2 output
0
0
250
2
125
MHz
MHz
FSELx=0
FSELx=1
tP, REF
Reference Input Pulse Width
1.4
nS
tr, tf
CCLK Input Rise/Fall Time
1.0
3
nS
0.8 to 2.0V
tPLH
tPHL
Propagation delay
CCLK0,1 to any Q
CCLK0,1 to any Q
2.2
2.2
2.8
2.8
4.45
4.2
nS
nS
tPLZ, HZ
Output Disable Time
10
nS
tPZL, LZ
Output Enable Time
10
nS
tsk(O)
Output-to-output Skew
Within one bank
Any output Bank, Same output divider
Any output, Any output divider
150
200
350
pS
pS
pS
tsk(PP)
Device-to-device Skew
2.25
nS
tSK(P)
Output pulse skew
4
200
pS
DCQ
Output Duty Cycle
÷1 output
÷2 output
47
45
50
50
53
55
%
%
DCREF = 50%
DCREF = 25%-75%
tr, tf
Output Rise/Fall Time
0.1
1.0
nS
0.55 to 2.4V
Note: 1 AC characteristics apply for parallel output termination of 50Ω to VTT
2 The ASM2I99446 is functional up to an input and output clock frequency of 350MHz and is characterized up to 250MHz.
3 Violation of the 1.0nS maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, reference input pulse width,
output duty cycle and maximum frequency specifications.
4 Output pulse skew is the absolute difference of the propagation delay times | tpLH - tpHL |.
Table 8: DC CHARACTERISTICS (V
CC = VCCA = VCCB = VCCC = 2.5V ±5%, TA = –40°C to +85°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
VIH
Input High Voltage
1.7
VCC + 0.3
V
LVCMOS
VIL
Input Low Voltage
-0.3
0.7
V
LVCMOS
VOH
Output High Voltage
1.8
V
IOH=-15 mA
1
VOL
Output Low Voltage
0.6
V
IOL= 15 mA
ZOUT
Output Impedance
17 - 20
2
Ω
IIN
Input Current
2
±200
µA
VIN=GND or VIN=VCC
ICCQ
3
Maximum Quiescent Supply Current
2.0
mA
All VCC Pins
Note: 1 The ASM2I99446 is capable of driving 50Ω transmission lines on the incident edge. Each output drives one 50Ω parallel terminated transmission line to
a termination voltage of VTT. Alternatively, the device drives up to two 50Ω series terminated transmission lines per output.
2 Input pull-up / pull-down resistors influence input current.
3 ICCQ is the DC current consumption of the device with all outputs open and the input in its default state or open.



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