LP5012 datasheet(37/51 Pages) TI

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10 Power Supply Recommendations

The device is designed to operate from a VVCC input-voltage supply range from 2.7 V and 5.5 V. This input

supply must be well-regulated and able to withstand maximum input current and maintain stable voltage without

voltage drop even in a load-transition condition (start-up or rapid intensity change). The resistance of the input

supply rail must be low enough that the input-current transient does not cause a drop below a 2.7-V level in the

LP50xx VVCC supply voltage.

11 Layout

11.1 Layout Guidelines

To prevent thermal shutdown, the junction temperature, TJ, must be less than T(TSD). If the voltage drop across

the output channels is high, the device power dissipation can be large. The LP50xx device has very good

thermal performance because of the thermal pad design; however, the PCB layout is also very important to

ensure that the device has good thermal performance. Good PCB design can optimize heat transfer, which is

essential for the long-term reliability of the device.

Use the following guidelines when designing the device layout:

• Place the CVCAP, CVCCand RIREF as close to the device as possible. Also, TI recommends putting the ground

plane as Figure 11-1 and Figure 11-2.

• Maximize the copper coverage on the PCB to increase the thermal conductivity of the board. The major heat

flow path from the package to the ambient is through copper on the PCB. Maximum copper density is

extremely important when no heat sinks are attached to the PCB on the other side from the package.

• Add as many thermal vias as possible directly under the package ground pad to optimize the thermal

conductivity of the board.

• Use either plated-shut or plugged and capped vias for all the thermal vias on both sides of the board to

prevent solder voids. To ensure reliability and performance, the solder coverage must be at least 85%.

www.ti.com

LP5009, LP5012

SLVSEH2B – MAY 2019 – REVISED AUGUST 2020

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LP5012 Datasheet(PDF) 37 Page - Texas Instruments