MSP430F6435IPZR datasheet(34/128 Pages) TI

34 / 128 page

8.28 Timer_A, Timers TA0, TA1, and TA2

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

VCC

MIN

MAX UNIT

fTA

Timer_A input clock frequency

Internal: SMCLK or ACLK,

External: TACLK,

Duty cycle = 50% ±10%

1.8 V, 3 V

MHz

tTA,cap

Timer_A capture timing

All capture inputs, Minimum pulse

duration required for capture

1.8 V, 3 V

8.29 Timer_B, Timer TB0

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

VCC

MIN

MAX UNIT

fTB

Timer_B input clock frequency

Internal: SMCLK or ACLK,

External: TBCLK,

Duty cycle = 50% ±10%

1.8 V, 3 V

MHz

tTB,cap

Timer_B capture timing

All capture inputs, Minimum pulse

duration required for capture

1.8 V, 3 V

MSP430F6438, MSP430F6436, MSP430F6435, MSP430F6433

SLAS720F – AUGUST 2010 – REVISED SEPTEMBER 2020

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Product Folder Links: MSP430F6438 MSP430F6436 MSP430F6435 MSP430F6433

MSP430F6435IPZR Datasheet(PDF) 34 Page - Texas Instruments

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