DF329 datasheet(16/17 Pages) PADAUK

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DF329

3-Phase Brushless DC Motor Controller

Page 16 of 17

PDK-DS-DF329-EN-V002 – Mar. 6, 2019

8. POR for DC Fan Application

As shown in Fig 8-1, DF329 generates a good power on reset (POR) signal when VDD rises from 0V to 5V in

TPOR (max. 50ms) and rises through the voltage range of 0.7V to 1.6V in TFSV (max. 10ms).

If there are a lot of abnormal power noises in VDD power-on time period and TPOR and TFSV do not meet the

specifications, DF329 is not able to guarantee circuit initialization and may cause a malfunction.

VDD

VDD Power-on Time

0.7V

1.6V

TFSV

TPOR

TFSV < 10ms

TPOR < 50ms

time

Fig. 8-1

During power-off as shown in Fig 8-2 and Fig 8-3, VDD has to be discharged to VPDRV (max. is 0.7V) for the next

power-on. In case VDD is more than VPDRV, it is not recognized to do the next power-on.

VDD Power-off

Max. is 0.7V

time

VDD

VPDRV

VDD Power-off

Max. is 0.7V

time

VDD

VPDRV

Fig. 8-2

Fig. 8-3

NOTICE:

It may cause DF329 malfunction, fail or crash when power-on and power-off do not meet the specifications.

Another proper POR is needed in order to get rid of such status.

DF329 Datasheet(PDF) 16 Page - PADAUK Technology.